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Message-ID: <20221103025656.8714-2-tinghan.shen@mediatek.com>
Date: Thu, 3 Nov 2022 10:56:54 +0800
From: Tinghan Shen <tinghan.shen@...iatek.com>
To: Ryder Lee <ryder.lee@...iatek.com>,
Jianjun Wang <jianjun.wang@...iatek.com>,
Bjorn Helgaas <bhelgaas@...gle.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Matthias Brugger <matthias.bgg@...il.com>
CC: <linux-pci@...r.kernel.org>, <linux-mediatek@...ts.infradead.org>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<Project_Global_Chrome_Upstream_Group@...iatek.com>,
TingHan Shen <tinghan.shen@...iatek.com>
Subject: [PATCH v5 1/3] dt-bindings: PCI: mediatek-gen3: Support mt8195
From: Jianjun Wang <jianjun.wang@...iatek.com>
In order to support mt8195 pcie node, update the yaml to support new
properties of iommu and power-domain, and update the reset-names
property to allow only one 'mac' name.
Signed-off-by: Jianjun Wang <jianjun.wang@...iatek.com>
Signed-off-by: TingHan Shen <tinghan.shen@...iatek.com>
---
.../devicetree/bindings/pci/mediatek-pcie-gen3.yaml | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
index c00be39af64e..bc90f0ec7bd9 100644
--- a/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
+++ b/Documentation/devicetree/bindings/pci/mediatek-pcie-gen3.yaml
@@ -70,15 +70,21 @@ properties:
minItems: 1
maxItems: 8
+ iommu-map:
+ maxItems: 1
+
+ iommu-map-mask:
+ const: 0
+
resets:
minItems: 1
maxItems: 2
reset-names:
minItems: 1
+ maxItems: 2
items:
- - const: phy
- - const: mac
+ enum: [ phy, mac ]
clocks:
maxItems: 6
@@ -107,6 +113,9 @@ properties:
items:
- const: pcie-phy
+ power-domains:
+ maxItems: 1
+
'#interrupt-cells':
const: 1
--
2.18.0
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