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Date: Thu, 3 Nov 2022 17:58:58 +0000 From: Ashok Raj <ashok.raj@...el.com> To: Borislav Petkov <bp@...en8.de>, Thomas Gleixner <tglx@...utronix.de> Cc: "LKML Mailing List" <linux-kernel@...r.kernel.org>, X86-kernel <x86@...nel.org>, Tony Luck <tony.luck@...el.com>, Dave Hansen <dave.hansen@...el.com>, Arjan van de Ven <arjan.van.de.ven@...el.com>, Andy Lutomirski <luto@...nel.org>, Jacon Jun Pan <jacob.jun.pan@...el.com>, Tom Lendacky <thomas.lendacky@....com>, Kai Huang <kai.huang@...el.com>, Andrew Cooper <andrew.cooper3@...rix.com>, Ashok Raj <ashok.raj@...el.com> Subject: [v2 10/13] x86/microcode: Add a generic mechanism to declare support for minrev Intel microcode adds some meta-data to report a minimum required revision before this new microcode can be late-loaded. There are no generic mechanism to declare support for all vendors. Add generic support to microcode to declare support, so the tainting and late-loading can be permitted in those architectures that support reporting a minrev in some form. Late loading has added support for - New images declaring a required minimum base version before a late-load is performed. - Improved NMI handling during update to avoid sibling threads taking NMI's while primary is still not complete with the microcode update. With these changes, late-loading can be re-enabled. Tainting only happens on architectures that don't support minimum required version reporting. Reviewed-by: Tony Luck <tony.luck@...el.com> Signed-off-by: Ashok Raj <ashok.raj@...el.com> --- v2: (Kai) Add missing initialization local variable minrev arch/x86/include/asm/microcode.h | 2 ++ arch/x86/kernel/cpu/microcode/core.c | 15 +++++++++++---- arch/x86/kernel/cpu/microcode/intel.c | 6 ++++++ arch/x86/Kconfig | 7 ++++--- 4 files changed, 23 insertions(+), 7 deletions(-) diff --git a/arch/x86/include/asm/microcode.h b/arch/x86/include/asm/microcode.h index f16973fb7330..6286b4056792 100644 --- a/arch/x86/include/asm/microcode.h +++ b/arch/x86/include/asm/microcode.h @@ -64,6 +64,8 @@ enum ucode_state { }; struct microcode_ops { + int (*check_minrev) (void); + enum ucode_state (*request_microcode_fw) (int cpu, struct device *); void (*microcode_fini_cpu) (int cpu); diff --git a/arch/x86/kernel/cpu/microcode/core.c b/arch/x86/kernel/cpu/microcode/core.c index 6f59ffdf2881..17dba13d397d 100644 --- a/arch/x86/kernel/cpu/microcode/core.c +++ b/arch/x86/kernel/cpu/microcode/core.c @@ -607,6 +607,7 @@ static ssize_t reload_store(struct device *dev, enum ucode_state tmp_ret = UCODE_OK; int bsp = boot_cpu_data.cpu_index; unsigned long val; + int minrev = 0; ssize_t ret = 0; ret = kstrtoul(buf, 0, &val); @@ -622,13 +623,18 @@ static ssize_t reload_store(struct device *dev, if (ret) goto put; + if (microcode_ops->check_minrev) + minrev = microcode_ops->check_minrev(); + + if (!minrev) { + pr_err("Attempting late microcode loading - it is dangerous and taints the kernel.\n"); + pr_err("You should switch to early loading, if possible.\n"); + } + tmp_ret = microcode_ops->request_microcode_fw(bsp, µcode_pdev->dev); if (tmp_ret != UCODE_NEW) goto put; - pr_err("Attempting late microcode loading - it is dangerous and taints the kernel.\n"); - pr_err("You should switch to early loading, if possible.\n"); - mutex_lock(µcode_mutex); ret = microcode_reload_late(); mutex_unlock(µcode_mutex); @@ -639,7 +645,8 @@ static ssize_t reload_store(struct device *dev, if (ret == 0) ret = size; - add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK); + if (!minrev) + add_taint(TAINT_CPU_OUT_OF_SPEC, LOCKDEP_STILL_OK); return ret; } diff --git a/arch/x86/kernel/cpu/microcode/intel.c b/arch/x86/kernel/cpu/microcode/intel.c index 020d0feed3cc..5d2ee76cd36c 100644 --- a/arch/x86/kernel/cpu/microcode/intel.c +++ b/arch/x86/kernel/cpu/microcode/intel.c @@ -956,7 +956,13 @@ static enum ucode_state request_microcode_fw(int cpu, struct device *device) return ret; } +static int intel_check_minrev(void) +{ + return 1; +} + static struct microcode_ops microcode_intel_ops = { + .check_minrev = intel_check_minrev, .request_microcode_fw = request_microcode_fw, .collect_cpu_info = collect_cpu_info, .apply_microcode = apply_microcode_intel, diff --git a/arch/x86/Kconfig b/arch/x86/Kconfig index 6d1879ef933a..b53626bff5f7 100644 --- a/arch/x86/Kconfig +++ b/arch/x86/Kconfig @@ -1353,15 +1353,16 @@ config MICROCODE_AMD processors will be enabled. config MICROCODE_LATE_LOADING - bool "Late microcode loading (DANGEROUS)" - default n + bool "Late microcode loading" + default y depends on MICROCODE help Loading microcode late, when the system is up and executing instructions is a tricky business and should be avoided if possible. Just the sequence of synchronizing all cores and SMT threads is one fragile dance which does not guarantee that cores might not softlock after the loading. Therefore, - use this at your own risk. Late loading taints the kernel too. + use this at your own risk. Late loading taints the kernel, if it + doesn't support a minimum required base version before an update. config X86_MSR tristate "/dev/cpu/*/msr - Model-specific register support" -- 2.34.1
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