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Date:   Fri, 4 Nov 2022 17:50:46 +0100
From:   Robert Marko <robert.marko@...tura.hr>
To:     Vladimir Oltean <vladimir.oltean@....com>
Cc:     Maxime Chevallier <maxime.chevallier@...tlin.com>,
        "davem@...emloft.net" <davem@...emloft.net>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Jakub Kicinski <kuba@...nel.org>,
        Eric Dumazet <edumazet@...gle.com>,
        Paolo Abeni <pabeni@...hat.com>,
        "netdev@...r.kernel.org" <netdev@...r.kernel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "devicetree@...r.kernel.org" <devicetree@...r.kernel.org>,
        "thomas.petazzoni@...tlin.com" <thomas.petazzoni@...tlin.com>,
        Andrew Lunn <andrew@...n.ch>,
        Florian Fainelli <f.fainelli@...il.com>,
        Heiner Kallweit <hkallweit1@...il.com>,
        Russell King <linux@...linux.org.uk>,
        "linux-arm-kernel@...ts.infradead.org" 
        <linux-arm-kernel@...ts.infradead.org>,
        Luka Perkov <luka.perkov@...tura.hr>,
        Andy Gross <agross@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...ainline.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Subject: Re: [PATCH net-next v7 5/5] ARM: dts: qcom: ipq4019: Add description
 for the IPQESS Ethernet controller

On Fri, Nov 4, 2022 at 5:45 PM Vladimir Oltean <vladimir.oltean@....com> wrote:
>
> On Fri, Nov 04, 2022 at 05:42:30PM +0100, Robert Marko wrote:
> > > +                       phy-mode = "internal";
> > > +                       status = "disabled";
> >
> > The fixed-link should be defined here AFAIK, otherwise it will fail probing with
> > just internal PHY mode.
>
> It wouldn't fail to probe because it has status = "disabled" by default,
> and who enables that would also provide the fixed-link presumably.
> But if the speed of the pseudo-MAC that goes to the switch is not board
> specific, indeed the fixed-link belongs to the SoC dtsi.

Yes, its directly connected to the switch CPU port and its a part of the SoC,
so it should be defined in the SoC DTSI as it cannot really be changed on
boards.

Regards,
Robert
-- 
Robert Marko
Staff Embedded Linux Engineer
Sartura Ltd.
Lendavska ulica 16a
10000 Zagreb, Croatia
Email: robert.marko@...tura.hr
Web: www.sartura.hr

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