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Message-Id: <20221104193657.105130-5-nick.hawkins@hpe.com>
Date: Fri, 4 Nov 2022 14:36:55 -0500
From: nick.hawkins@....com
To: jdelvare@...e.com, linux@...ck-us.net, robh+dt@...nel.org,
krzysztof.kozlowski+dt@...aro.org, verdun@....com,
nick.hawkins@....com, corbet@....net, linux@...linux.org.uk,
linux-hwmon@...r.kernel.org, linux-kernel@...r.kernel.org,
devicetree@...r.kernel.org, linux-doc@...r.kernel.org,
linux-arm-kernel@...ts.infradead.org
Subject: [PATCH v1 4/6] ARM: dts: add GXP Support for fans and SPI
From: Nick Hawkins <nick.hawkins@....com>
Reorganize the base address of AHB to accommodate the SPI and fan driver
register requirements. Add the hpe,gxp-spifi and hpe,gxp-fan-ctrl
compatibles. Add comments to make the register range more clear.
Signed-off-by: Nick Hawkins <nick.hawkins@....com>
---
arch/arm/boot/dts/hpe-bmc-dl360gen10.dts | 58 +++++++++++++++++++++
arch/arm/boot/dts/hpe-gxp.dtsi | 64 +++++++++++++++++-------
2 files changed, 103 insertions(+), 19 deletions(-)
diff --git a/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts b/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
index 3a7382ce40ef..d49dcef95c5c 100644
--- a/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
+++ b/arch/arm/boot/dts/hpe-bmc-dl360gen10.dts
@@ -24,3 +24,61 @@
reg = <0x40000000 0x20000000>;
};
};
+
+&spifi {
+ status = "okay";
+ flash@0 {
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ u-boot@0 {
+ label = "u-boot";
+ reg = <0x0 0x60000>;
+ };
+
+ u-boot-env@...00 {
+ label = "u-boot-env";
+ reg = <0x60000 0x20000>;
+ };
+
+ kernel@...00 {
+ label = "kernel";
+ reg = <0x80000 0x4c0000>;
+ };
+
+ rofs@...000 {
+ label = "rofs";
+ reg = <0x540000 0x1740000>;
+ };
+
+ rwfs@...0000 {
+ label = "rwfs";
+ reg = <0x1c80000 0x250000>;
+ };
+
+ section@...0000{
+ label = "section";
+ reg = <0x1ed0000 0x130000>;
+ };
+ };
+ };
+ flash@1 {
+ partitions {
+ compatible = "fixed-partitions";
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ host-prime@0 {
+ label = "host-prime";
+ reg = <0x0 0x02000000>;
+ };
+
+ host-second@...0000 {
+ label = "host-second";
+ reg = <0x02000000 0x02000000>;
+ };
+ };
+ };
+};
diff --git a/arch/arm/boot/dts/hpe-gxp.dtsi b/arch/arm/boot/dts/hpe-gxp.dtsi
index cf735b3c4f35..27486dd4d99a 100644
--- a/arch/arm/boot/dts/hpe-gxp.dtsi
+++ b/arch/arm/boot/dts/hpe-gxp.dtsi
@@ -1,6 +1,6 @@
// SPDX-License-Identifier: GPL-2.0
/*
- * Device Tree file for HPE GXP
+ * Device Tree for HPE
*/
/dts-v1/;
@@ -52,76 +52,102 @@
cache-level = <2>;
};
- ahb@...00000 {
+ ahb@...00000 {
compatible = "simple-bus";
#address-cells = <1>;
#size-cells = <1>;
- ranges = <0x0 0xc0000000 0x30000000>;
+ ranges = <0x0 0x80000000 0xf000000>, /* 0x80000000 - 0x8f000000 */
+ <0x40000000 0xc0000000 0x7fffffff>; /* 0xc0000000 - 0xffffffff */
dma-ranges;
- vic0: interrupt-controller@...0000 {
+ spifi: spi@...00200 { /* 0xc0000200 */
+ compatible = "hpe,gxp-spifi";
+ reg = <0x40000200 0x80>, <0x4000c000 0x100>, <0x78000000 0x7ff0000>;
+ interrupts = <20>;
+ interrupt-parent = <&vic0>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ status = "disabled";
+ flash@0 {
+ reg = <0>;
+ compatible = "jedec,spi-nor";
+ };
+
+ flash@1 {
+ reg = <1>;
+ compatible = "jedec,spi-nor";
+ };
+ };
+
+ vic0: interrupt-controller@...f0000 { /* 0xceff0000 */
compatible = "arm,pl192-vic";
- reg = <0xeff0000 0x1000>;
+ reg = <0x4eff0000 0x1000>;
interrupt-controller;
#interrupt-cells = <1>;
};
- vic1: interrupt-controller@...00000 {
+ vic1: interrupt-controller@...000 { /* 0x80f00000 */
compatible = "arm,pl192-vic";
- reg = <0x80f00000 0x1000>;
+ reg = <0xf00000 0x1000>;
interrupt-controller;
#interrupt-cells = <1>;
};
- uarta: serial@e0 {
+ uarta: serial@...000e0 { /* 0xc00000e0 */
compatible = "ns16550a";
- reg = <0xe0 0x8>;
+ reg = <0x400000e0 0x8>;
interrupts = <17>;
interrupt-parent = <&vic0>;
clock-frequency = <1846153>;
reg-shift = <0>;
};
- uartb: serial@e8 {
+ uartb: serial@...000e8 { /* 0xc00000e8 */
compatible = "ns16550a";
- reg = <0xe8 0x8>;
+ reg = <0x400000e8 0x8>;
interrupts = <18>;
interrupt-parent = <&vic0>;
clock-frequency = <1846153>;
reg-shift = <0>;
};
- uartc: serial@f0 {
+ uartc: serial@...000f0 { /* 0xc00000f0 */
compatible = "ns16550a";
- reg = <0xf0 0x8>;
+ reg = <0x400000f0 0x8>;
interrupts = <19>;
interrupt-parent = <&vic0>;
clock-frequency = <1846153>;
reg-shift = <0>;
};
- usb0: usb@...0000 {
+ usb0: usb@...e0000 { /* 0xcefe0000 */
compatible = "hpe,gxp-ehci", "generic-ehci";
- reg = <0xefe0000 0x100>;
+ reg = <0x4efe0000 0x100>;
interrupts = <7>;
interrupt-parent = <&vic0>;
};
- st: timer@80 {
+ st: timer@...00080 { /* 0xc0000080 */
compatible = "hpe,gxp-timer";
- reg = <0x80 0x16>;
+ reg = <0x40000080 0x16>;
interrupts = <0>;
interrupt-parent = <&vic0>;
clocks = <&iopclk>;
clock-names = "iop";
};
- usb1: usb@...0100 {
+ usb1: usb@...e0100 { /* 0xcefe0100 */
compatible = "hpe,gxp-ohci", "generic-ohci";
- reg = <0xefe0100 0x110>;
+ reg = <0x4efe0100 0x110>;
interrupts = <6>;
interrupt-parent = <&vic0>;
};
+
+ fanctrl: fanctrl@...00c00 { /* 0xc0000c00 */
+ compatible = "hpe,gxp-fan-ctrl";
+ reg = <0x40000c00 0x200>, <0x51000027 0x06>, <0x200070 0x01>;
+ reg-names = "base", "plreg", "fn2reg";
+ };
};
};
};
--
2.17.1
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