linux-kernel - Re: [PATCH 2/2] soc: qcom: spm: Implement support for SAWv2.3, MSM8976 L2 PM

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Message-ID: <CAA8EJprOUmFKHr91qAmmKjXn0Q6EX7pgpaMp4J53jsF+5E_M8Q@mail.gmail.com>
Date:   Sat, 5 Nov 2022 00:16:55 +0300
From:   Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
To:     Marijn Suijten <marijn.suijten@...ainline.org>
Cc:     AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>, agross@...nel.org,
        andersson@...nel.org, konrad.dybcio@...ainline.org,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, kernel@...labora.com,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...ainline.org>
Subject: Re: [PATCH 2/2] soc: qcom: spm: Implement support for SAWv2.3,
 MSM8976 L2 PM

On Fri, 4 Nov 2022 at 17:34, Marijn Suijten
<marijn.suijten@...ainline.org> wrote:
>
> On 2022-11-04 14:34:52, AngeloGioacchino Del Regno wrote:
> > From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...ainline.org>
> >
> > Implement the support for SAW v2.3, used in at least MSM8976, MSM8956
> > and APQ variants and while at it also add the configuration for the
> > MSM8976's little (a53) and big (a72) clusters cache power management.
> >
> > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...ainline.org>
> > [Marijn: reorder struct definitions to follow high-to-low order]
>
> Signed-off-by: Marijn Suijten <marijn.suijten@...ainline.org>

With this sign-off in place,

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>

>
> > Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
> > ---
> >  drivers/soc/qcom/spm.c | 33 +++++++++++++++++++++++++++++++++
> >  1 file changed, 33 insertions(+)
> >
> > diff --git a/drivers/soc/qcom/spm.c b/drivers/soc/qcom/spm.c
> > index 484b42b7454e..bfcd321d7837 100644
> > --- a/drivers/soc/qcom/spm.c
> > +++ b/drivers/soc/qcom/spm.c
> > @@ -98,6 +98,35 @@ static const struct spm_reg_data spm_reg_8916_cpu = {
> >       .start_index[PM_SLEEP_MODE_SPC] = 5,
> >  };
> >
> > +static const u16 spm_reg_offset_v2_3[SPM_REG_NR] = {
> > +     [SPM_REG_CFG]           = 0x08,
> > +     [SPM_REG_SPM_CTL]       = 0x30,
> > +     [SPM_REG_DLY]           = 0x34,
> > +     [SPM_REG_PMIC_DATA_0]   = 0x40,
> > +     [SPM_REG_PMIC_DATA_1]   = 0x44,
> > +};
> > +
> > +/* SPM register data for 8976 */
> > +static const struct spm_reg_data spm_reg_8976_gold_l2 = {
> > +     .reg_offset = spm_reg_offset_v2_3,
> > +     .spm_cfg = 0x14,
> > +     .spm_dly = 0x3c11840a,
> > +     .pmic_data[0] = 0x03030080,
> > +     .pmic_data[1] = 0x00030000,
> > +     .start_index[PM_SLEEP_MODE_STBY] = 0,
> > +     .start_index[PM_SLEEP_MODE_SPC] = 3,
> > +};
> > +
> > +static const struct spm_reg_data spm_reg_8976_silver_l2 = {
> > +     .reg_offset = spm_reg_offset_v2_3,
> > +     .spm_cfg = 0x14,
> > +     .spm_dly = 0x3c102800,
> > +     .pmic_data[0] = 0x03030080,
> > +     .pmic_data[1] = 0x00030000,
> > +     .start_index[PM_SLEEP_MODE_STBY] = 0,
> > +     .start_index[PM_SLEEP_MODE_SPC] = 2,
> > +};
> > +
> >  static const u16 spm_reg_offset_v2_1[SPM_REG_NR] = {
> >       [SPM_REG_CFG]           = 0x08,
> >       [SPM_REG_SPM_CTL]       = 0x30,
> > @@ -213,6 +242,10 @@ static const struct of_device_id spm_match_table[] = {
> >         .data = &spm_reg_8916_cpu },
> >       { .compatible = "qcom,msm8974-saw2-v2.1-cpu",
> >         .data = &spm_reg_8974_8084_cpu },
> > +     { .compatible = "qcom,msm8976-gold-saw2-v2.3-l2",
> > +       .data = &spm_reg_8976_gold_l2 },
> > +     { .compatible = "qcom,msm8976-silver-saw2-v2.3-l2",
> > +       .data = &spm_reg_8976_silver_l2 },
> >       { .compatible = "qcom,msm8998-gold-saw2-v4.1-l2",
> >         .data = &spm_reg_8998_gold_l2 },
> >       { .compatible = "qcom,msm8998-silver-saw2-v4.1-l2",
> > --
> > 2.37.2
> >



-- 
With best wishes
Dmitry