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Message-ID: <dae6f6075673919e22e0b642d1ebf2f601f94f1a.camel@mediatek.com>
Date: Fri, 4 Nov 2022 09:31:59 +0000
From: Nancy Lin (林欣螢) <Nancy.Lin@...iatek.com>
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Subject: Re: [PATCH v27 06/11] soc: mediatek: add mtk-mmsys config API for
mt8195 vdosys1
Dear Nicolas,
Thanks for the review.
On Thu, 2022-11-03 at 15:56 -0400, Nícolas F. R. A. Prado wrote:
> On Thu, Nov 03, 2022 at 11:25:07AM +0800, Nancy.Lin wrote:
> > Add four mmsys config APIs. The config APIs are used for config
> > mmsys reg. Some mmsys regs need to be set according to the
> > HW engine binding to the mmsys simultaneously.
> >
> > 1. mtk_mmsys_merge_async_config: config merge async width/height.
> > async is used for cross-clock domain synchronization.
> > 2. mtk_mmsys_hdr_confing: config hdr backend async width/height.
>
> [..]
> > --- a/drivers/soc/mediatek/mtk-mmsys.c
> > +++ b/drivers/soc/mediatek/mtk-mmsys.c
>
> [..]
> > +void mtk_mmsys_hdr_confing(struct device *dev, int be_width, int
> > be_height)
>
> confing -> config
>
> Need to update the following commit as well.
>
> Thanks,
> Nícolas
>
Sorry for the typo. I will fix it in the next revision.
Thanks,
Nancy
> > +{
> > + mtk_mmsys_update_bits(dev_get_drvdata(dev),
> > MT8195_VDO1_HDRBE_ASYNC_CFG_WD, ~0,
> > + be_height << 16 | be_width);
> > +}
> > +EXPORT_SYMBOL_GPL(mtk_mmsys_hdr_confing);
>
> [..]
> > +void mtk_mmsys_hdr_confing(struct device *dev, int be_width, int
> > be_height);
>
> [..]
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