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Message-ID: <5c410969-2176-49cf-640f-8023c421682e@arm.com>
Date:   Fri, 4 Nov 2022 11:30:09 +0000
From:   James Clark <james.clark@....com>
To:     Rob Herring <robh@...nel.org>
Cc:     kvmarm@...ts.cs.columbia.edu, kvmarm@...ts.linux.dev,
        linux-arm-kernel@...ts.infradead.org,
        linux-perf-users@...r.kernel.org, linux-kernel@...r.kernel.org,
        Mark Brown <broonie@...nel.org>,
        Namhyung Kim <namhyung@...nel.org>,
        James Morse <james.morse@....com>,
        Ingo Molnar <mingo@...hat.com>,
        Mark Rutland <mark.rutland@....com>,
        Marc Zyngier <maz@...nel.org>,
        Suzuki K Poulose <suzuki.poulose@....com>,
        Will Deacon <will@...nel.org>,
        Alexandru Elisei <alexandru.elisei@....com>,
        Catalin Marinas <catalin.marinas@....com>,
        Arnaldo Carvalho de Melo <acme@...nel.org>,
        Peter Zijlstra <peterz@...radead.org>,
        Alexander Shishkin <alexander.shishkin@...ux.intel.com>,
        Oliver Upton <oliver.upton@...ux.dev>,
        Jiri Olsa <jolsa@...nel.org>
Subject: Re: [PATCH v2 0/7] perf: Arm SPEv1.2 support



On 19/10/2022 20:11, Rob Herring wrote:
> This series adds support for Arm SPEv1.2 which is part of the
> Armv8.7/Armv9.2 architecture. There's 2 new features that affect the 
> kernel: a new event filter bit, branch 'not taken', and an inverted 
> event filter register. 
> 
> Since this support adds new registers and fields, first the SPE register 
> defines are converted to automatic generation.
> 
> Note that the 'config3' addition in sysfs format files causes SPE to 
> break. A stable fix e552b7be12ed ("perf: Skip and warn on unknown format 
> 'configN' attrs") landed in v6.1-rc1.
> 
> The perf tool side changes are available here[1].
> 
> Tested on FVP.
> 
> [1] https://lore.kernel.org/all/20220914-arm-perf-tool-spe1-2-v2-v4-0-83c098e6212e@kernel.org/
> 

LGTM. Tested with [1] applied and on N1SDP (where it isn't supported),
and on the FVP. Enabling all the inverted filters results in no trace
and other combinations work as expected.

James

> Signed-off-by: Rob Herring <robh@...nel.org>
> ---
> Changes in v2:
> - Convert the SPE register defines to automatic generation
> - Fixed access to SYS_PMSNEVFR_EL1 when not present
> - Rebase on v6.1-rc1
> - Link to v1: https://lore.kernel.org/r/20220825-arm-spe-v8-7-v1-0-c75b8d92e692@kernel.org
> 
> ---
> Rob Herring (7):
>       perf: arm_spe: Use feature numbering for PMSEVFR_EL1 defines
>       arm64: Drop SYS_ from SPE register defines
>       arm64/sysreg: Convert SPE registers to automatic generation
>       perf: arm_spe: Drop BIT() and use FIELD_GET/PREP accessors
>       perf: arm_spe: Support new SPEv1.2/v8.7 'not taken' event
>       perf: Add perf_event_attr::config3
>       perf: arm_spe: Add support for SPEv1.2 inverted event filtering
> 
>  arch/arm64/include/asm/el2_setup.h |   6 +-
>  arch/arm64/include/asm/sysreg.h    |  99 +++------------------------
>  arch/arm64/kvm/debug.c             |   2 +-
>  arch/arm64/kvm/hyp/nvhe/debug-sr.c |   2 +-
>  arch/arm64/tools/sysreg            | 116 +++++++++++++++++++++++++++++++
>  drivers/perf/arm_spe_pmu.c         | 136 ++++++++++++++++++++++++-------------
>  include/uapi/linux/perf_event.h    |   3 +
>  7 files changed, 224 insertions(+), 140 deletions(-)
> ---
> base-commit: 9abf2313adc1ca1b6180c508c25f22f9395cc780
> change-id: 20220825-arm-spe-v8-7-fedf04e16f23
> 
> Best regards,

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