linux-kernel - Re: [PATCH v2 1/8] x86: KVM: Move existing x86 CPUID leaf [CPUID_7_1

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Message-ID: <9197a0a4-4c15-1e6e-a44b-a8036c2104c4@linux.intel.com>
Date:   Fri, 4 Nov 2022 10:01:55 +0800
From:   Jiaxi Chen <jiaxi.chen@...ux.intel.com>
To:     Borislav Petkov <bp@...en8.de>
Cc:     kvm@...r.kernel.org, tglx@...utronix.de, mingo@...hat.com,
        dave.hansen@...ux.intel.com, x86@...nel.org, hpa@...or.com,
        seanjc@...gle.com, pbonzini@...hat.com, ndesaulniers@...gle.com,
        alexandre.belloni@...tlin.com, peterz@...radead.org,
        jpoimboe@...nel.org, chang.seok.bae@...el.com,
        pawan.kumar.gupta@...ux.intel.com, babu.moger@....com,
        jmattson@...gle.com, sandipan.das@....com, tony.luck@...el.com,
        sathyanarayanan.kuppuswamy@...ux.intel.com, fenghua.yu@...el.com,
        keescook@...omium.org, nathan@...nel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 1/8] x86: KVM: Move existing x86 CPUID leaf
 [CPUID_7_1_EAX] to kvm-only leaf



On 11/3/2022 4:45 PM, Borislav Petkov wrote:
> On Thu, Nov 03, 2022 at 10:50:23AM +0800, Jiaxi Chen wrote:
>> diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
>> index 1a85e1fb0922..fbb4e7bd2288 100644
>> --- a/arch/x86/include/asm/cpufeature.h
>> +++ b/arch/x86/include/asm/cpufeature.h
>> @@ -24,7 +24,7 @@ enum cpuid_leafs
>>  	CPUID_7_0_EBX,
>>  	CPUID_D_1_EAX,
>>  	CPUID_LNX_4,
>> -	CPUID_7_1_EAX,
>> +	CPUID_DUMMY,
>>  	CPUID_8000_0008_EBX,
>>  	CPUID_6_EAX,
>>  	CPUID_8000_000A_EDX,
> 
> No, do this (diff ontop):
> 
> diff --git a/arch/x86/include/asm/cpufeature.h b/arch/x86/include/asm/cpufeature.h
> index fbb4e7bd2288..b2905ddd7ab4 100644
> --- a/arch/x86/include/asm/cpufeature.h
> +++ b/arch/x86/include/asm/cpufeature.h
> @@ -24,7 +24,7 @@ enum cpuid_leafs
>  	CPUID_7_0_EBX,
>  	CPUID_D_1_EAX,
>  	CPUID_LNX_4,
> -	CPUID_DUMMY,
> +	CPUID_LNX_5,
>  	CPUID_8000_0008_EBX,
>  	CPUID_6_EAX,
>  	CPUID_8000_000A_EDX,
> diff --git a/arch/x86/include/asm/cpufeatures.h b/arch/x86/include/asm/cpufeatures.h
> index 91acf8b8e493..5c9023438e57 100644
> --- a/arch/x86/include/asm/cpufeatures.h
> +++ b/arch/x86/include/asm/cpufeatures.h
> @@ -306,6 +306,8 @@
>  #define X86_FEATURE_RSB_VMEXIT_LITE	(11*32+17) /* "" Fill RSB on VM exit when EIBRS is enabled */
>  #define X86_FEATURE_CALL_DEPTH		(11*32+18) /* "" Call depth tracking for RSB stuffing */
>  
> +/* Linux-defined mapping, word 12 */
> +
>  /* AMD-defined CPU features, CPUID level 0x80000008 (EBX), word 13 */
>  #define X86_FEATURE_CLZERO		(13*32+ 0) /* CLZERO instruction */
>  #define X86_FEATURE_IRPERF		(13*32+ 1) /* Instructions Retired Count */
> 
> ---
> 
> I'm pretty sure we'll need new bits soon so let's reuse that one for
> Linux-defined flags.
> 
> Then you can drop patch 2.
> 

Hi Boris,

Yes, that's reasonable. I understand the goodnees of putting CPUID_LNX_5
here is to avoid changing the array length [NCAPINTS] and other parts twice.
But before new bits come, word 12 is empty in this gap. Is that ok?

-- 
Regards,
Jiaxi