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Message-ID: <34f9a445-74bd-95e8-f1a6-5b142b95ee6f@collabora.com>
Date:   Fri, 4 Nov 2022 15:12:22 +0100
From:   AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
        agross@...nel.org
Cc:     andersson@...nel.org, konrad.dybcio@...ainline.org,
        robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org, marijn.suijten@...ainline.org,
        kernel@...labora.com
Subject: Re: [PATCH 1/2] dt-bindings: soc: qcom: Add bindings for Qualcomm
 Ramp Controller

Il 04/11/22 15:00, Krzysztof Kozlowski ha scritto:
> On 04/11/2022 09:35, AngeloGioacchino Del Regno wrote:
>> Document bindings for the Qualcomm Ramp Controller, found on various
>> legacy Qualcomm SoCs.
>>
>> Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
>> ---
>>   .../soc/qcom/qcom,ramp-controller.yaml        | 42 +++++++++++++++++++
>>   1 file changed, 42 insertions(+)
>>   create mode 100644 Documentation/devicetree/bindings/soc/qcom/qcom,ramp-controller.yaml
> 
> Filename based on compatible, so qcom,msm8976-ramp-controller.yaml
> 
>>
>> diff --git a/Documentation/devicetree/bindings/soc/qcom/qcom,ramp-controller.yaml b/Documentation/devicetree/bindings/soc/qcom/qcom,ramp-controller.yaml
>> new file mode 100644
>> index 000000000000..95ce48cfca4e
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/soc/qcom/qcom,ramp-controller.yaml
>> @@ -0,0 +1,42 @@
>> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
>> +%YAML 1.2
>> +---
>> +$id: "http://devicetree.org/schemas/soc/qcom/qcom,ramp-controller.yaml#"
>> +$schema: "http://devicetree.org/meta-schemas/core.yaml#"
> 
> Drop quotes from both lines above.
> 
>> +
>> +title: Qualcomm Ramp Controller
>> +
>> +maintainers:
>> +  - AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
>> +
>> +description:
>> +  The Ramp Controller is used to program the sequence ID for pulse
>> +  swallowing, enable sequences and linking Sequence IDs (SIDs) for
> 
> s/linking/link/ if I understand the sentence correctly (is used to:
> program, enable and link)
> 
>> +  the CPU cores on some Qualcomm SoCs.
>> +
>> +properties:
>> +  compatible:
>> +    items:
> 
> Drop items.
> 
>> +      enum:
> 
> I also think you did not test it...

I'm sorry, I acknowledged that I didn't test the yaml only after sending it...
v2 is coming :-)

Thanks,
Angelo

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