linux-kernel - [PATCH 5/8] ARM: dts: wpcm450: Add FIU SPI controller node

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Date:   Sat,  5 Nov 2022 19:59:08 +0100
From:   Jonathan Neuschäfer <j.neuschaefer@....net>
To:     linux-spi@...r.kernel.org, openbmc@...ts.ozlabs.org
Cc:     Lee Jones <lee@...nel.org>, Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Jonathan Neuschäfer <j.neuschaefer@....net>,
        Mark Brown <broonie@...nel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-gpio@...r.kernel.org
Subject: [PATCH 5/8] ARM: dts: wpcm450: Add FIU SPI controller node

Add the SPI controller (FIU, Flash Interface Unit) to the WPCM450
devicetree, according to the newly defined binding, as well as the SHM
(shared memory interface) syscon.

Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@....net>
---

This patch depends on the series:

	[PATCH v5 0/6] Nuvoton WPCM450 clock and reset driver
---
 arch/arm/boot/dts/nuvoton-wpcm450.dtsi | 16 ++++++++++++++++
 1 file changed, 16 insertions(+)

diff --git a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
index 439f9047ad651..299fcbba3089b 100644
--- a/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
+++ b/arch/arm/boot/dts/nuvoton-wpcm450.dtsi
@@ -470,5 +470,21 @@ hg7_pins: mux-hg7 {
 				function = "hg7";
 			};
 		};
+
+		fiu: spi-controller@...00000 {
+			compatible = "nuvoton,wpcm450-fiu";
+			#address-cells = <1>;
+			#size-cells = <0>;
+			reg = <0xc8000000 0x1000>, <0xc0000000 0x4000000>;
+			reg-names = "control", "memory";
+			clocks = <&clk WPCM450_CLK_FIU>;
+			status = "disabled";
+		};
+
+		shm: syscon@...01000 {
+			compatible = "nuvoton,wpcm450-shm", "syscon";
+			reg = <0xc8001000 0x1000>;
+			reg-io-width = <1>;
+		};
 	};
 };
--
2.35.1