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Message-ID: <dfb0958a-2575-e5f4-a61c-a17297ac6c07@sholland.org>
Date: Fri, 4 Nov 2022 22:01:18 -0500
From: Samuel Holland <samuel@...lland.org>
To: Jernej Skrabec <jernej.skrabec@...il.com>, mchehab@...nel.org,
hverkuil-cisco@...all.nl
Cc: robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
wens@...e.org, linux-media@...r.kernel.org,
devicetree@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
linux-sunxi@...ts.linux.dev, linux-kernel@...r.kernel.org
Subject: Re: [PATCH 3/3] arm64: dts: allwinner: h6: Add deinterlace node
On 11/1/22 07:32, Jernej Skrabec wrote:
> H6 has deinterlace core. Add a node for it.
>
> Signed-off-by: Jernej Skrabec <jernej.skrabec@...il.com>
Reviewed-by: Samuel Holland <samuel@...lland.org>
> ---
> arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi | 12 ++++++++++++
> 1 file changed, 12 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> index 0aa6dfafc197..badc6afd6941 100644
> --- a/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> +++ b/arch/arm64/boot/dts/allwinner/sun50i-h6.dtsi
> @@ -154,6 +154,18 @@ mixer0_out_tcon_top_mixer0: endpoint {
> };
> };
>
> + deinterlace@...0000 {
> + compatible = "allwinner,sun50i-h6-deinterlace";
> + reg = <0x01420000 0x2000>;
Not that it matters, as long as the range is big enough, but how did you
come up with this size? The only thing I find in the vendor devicetrees
is 0x20c, the offset of the last documented register.
Regards,
Samuel
> + clocks = <&ccu CLK_BUS_DEINTERLACE>,
> + <&ccu CLK_DEINTERLACE>,
> + <&ccu CLK_MBUS_DEINTERLACE>;
> + clock-names = "bus", "mod", "ram";
> + resets = <&ccu RST_BUS_DEINTERLACE>;
> + interrupts = <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
> + iommus = <&iommu 2>;
> + };
> +
> video-codec-g2@...0000 {
> compatible = "allwinner,sun50i-h6-vpu-g2";
> reg = <0x01c00000 0x1000>;
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