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Message-Id: <20221107155825.1644604-22-pierre.gondois@arm.com>
Date: Mon, 7 Nov 2022 16:57:14 +0100
From: Pierre Gondois <pierre.gondois@....com>
To: linux-kernel@...r.kernel.org
Cc: Pierre Gondois <pierre.gondois@....com>,
Jisheng Zhang <jszhang@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
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Broadcom internal kernel review list
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Neil Armstrong <neil.armstrong@...aro.org>,
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Liviu Dudau <liviu.dudau@....com>,
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Subject: [PATCH v2 21/23] arm64: dts: Update cache properties for synaptics
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).
Update the Device Trees accordingly.
Signed-off-by: Pierre Gondois <pierre.gondois@....com>
Reviewed-by: Jisheng Zhang <jszhang@...nel.org>
---
arch/arm64/boot/dts/synaptics/berlin4ct.dtsi | 1 +
1 file changed, 1 insertion(+)
diff --git a/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi b/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi
index 0949acee4728..926da7e1a6ba 100644
--- a/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi
+++ b/arch/arm64/boot/dts/synaptics/berlin4ct.dtsi
@@ -64,6 +64,7 @@ cpu3: cpu@3 {
l2: cache {
compatible = "cache";
+ cache-level = <2>;
};
idle-states {
--
2.25.1
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