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Message-ID: <20221107173614.474707d7@bootlin.com>
Date: Mon, 7 Nov 2022 17:36:14 +0100
From: Herve Codina <herve.codina@...tlin.com>
To: Geert Uytterhoeven <geert@...ux-m68k.org>
Cc: Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Magnus Damm <magnus.damm@...il.com>,
Gareth Williams <gareth.williams.jx@...esas.com>,
linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-usb@...r.kernel.org,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Miquel Raynal <miquel.raynal@...tlin.com>
Subject: Re: [PATCH 3/7] soc: renesas: r9a06g032-sysctrl: Handle h2mode
device-tree property
Hi Geert,
On Mon, 7 Nov 2022 16:18:06 +0100
Geert Uytterhoeven <geert@...ux-m68k.org> wrote:
> Hi Hervé,
>
> On Mon, Nov 7, 2022 at 2:59 PM Herve Codina <herve.codina@...tlin.com> wrote:
> > Handle the h2mode property and forces the CFG_USB[H2MODE] bit
> > accordingly.
> >
> > Signed-off-by: Herve Codina <herve.codina@...tlin.com>
>
> Thanks for your patch!
>
> > --- a/drivers/clk/renesas/r9a06g032-clocks.c
> > +++ b/drivers/clk/renesas/r9a06g032-clocks.c
> > @@ -946,6 +946,7 @@ static int __init r9a06g032_clocks_probe(struct platform_device *pdev)
> > struct clk *mclk;
> > unsigned int i;
> > u16 uart_group_sel[2];
> > + u32 usb, h2mode;
> > int error;
> >
> > clocks = devm_kzalloc(dev, sizeof(*clocks), GFP_KERNEL);
> > @@ -966,6 +967,26 @@ static int __init r9a06g032_clocks_probe(struct platform_device *pdev)
> > clocks->reg = of_iomap(np, 0);
> > if (WARN_ON(!clocks->reg))
> > return -ENOMEM;
> > +
> > + error = of_property_read_u32(np, "renesas,h2mode", &h2mode);
> > + if (!error) {
> > + usb = readl(clocks->reg + R9A06G032_SYSCTRL_USB);
> > + switch (h2mode) {
> > + case 0:
> > + /* 1 host, 1 device */
> > + usb &= ~R9A06G032_SYSCTRL_USB_H2MODE;
> > + break;
> > + case 1:
> > + /* 2 hosts */
> > + usb |= R9A06G032_SYSCTRL_USB_H2MODE;
> > + break;
> > + default:
> > + dev_err(dev, "invalid h2mode %d\n", h2mode);
> > + return -EINVAL;
> > + }
> > + writel(usb, clocks->reg + R9A06G032_SYSCTRL_USB);
>
> Reading the big fat warnings in the documentation about changing
> this at runtime (disconnect nodes, reset clocks, ...), I'm wondering if
> the above is sufficient?
Well, indeed we should "disconnect all module operated by USBPLL clock
from the NoC interconnect".
I am a bit lost in the sysctrl driver and the clock/reset stuffs.
In fact, I don't really know how to do that.
I thought that setting the H2MODE value at the clock probe function would
be sufficient, expecting that the connections would not be already done
and I didn't see any issues on my system.
Maybe I missed the bootloader that could have already done some connections.
Can someone help ?
>
> > + }
> > +
> > for (i = 0; i < ARRAY_SIZE(r9a06g032_clocks); ++i) {
> > const struct r9a06g032_clkdesc *d = &r9a06g032_clocks[i];
> > const char *parent_name = d->source ?
>
> Gr{oetje,eeting}s,
>
> Geert
>
> --
> Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
>
> In personal conversations with technical people, I call myself a hacker. But
> when I'm talking to journalists I just say "programmer" or something like that.
> -- Linus Torvalds
Thanks,
Hervé
--
Hervé Codina, Bootlin
Embedded Linux and Kernel engineering
https://bootlin.com
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