linux-kernel - [PATCH v1 7/7] ARM: dts: imx: Update i.MXRT1050.dtsi compatibles

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite: Windows password security audit tool. GUI, reports in PDF.

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-Id: <20221107071511.2764628-8-Mr.Bossman075@gmail.com>
Date:   Mon,  7 Nov 2022 02:15:11 -0500
From:   Jesse Taube <mr.bossman075@...il.com>
To:     linux-imx@....com
Cc:     robh+dt@...nel.org, sboyd@...nel.org, shawnguo@...nel.org,
        kernel@...gutronix.de, festevam@...il.com, aisheng.dong@....com,
        stefan@...er.ch, linus.walleij@...aro.org,
        gregkh@...uxfoundation.org, arnd@...db.de, linux@...linux.org.uk,
        abel.vesa@....com, dev@...xeye.de, marcel.ziswiler@...adex.com,
        tharvey@...eworks.com, leoyang.li@....com, fugang.duan@....com,
        Mr.Bossman075@...il.com, giulio.benetti@...ettiengineering.com,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-arm-kernel@...ts.infradead.org,
        linux-gpio@...r.kernel.org, linux-serial@...r.kernel.org
Subject: [PATCH v1 7/7] ARM: dts: imx: Update i.MXRT1050.dtsi compatibles

Remove unused compatibles from i.MXRT1050.dtsi.
Change GPT clock-names to match documentation.

Cc: Giulio Benetti <giulio.benetti@...ettiengineering.com>
Signed-off-by: Jesse Taube <Mr.Bossman075@...il.com>
---
 arch/arm/boot/dts/imxrt1050.dtsi | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/arch/arm/boot/dts/imxrt1050.dtsi b/arch/arm/boot/dts/imxrt1050.dtsi
index 03e6a858a7be..8d79de239046 100644
--- a/arch/arm/boot/dts/imxrt1050.dtsi
+++ b/arch/arm/boot/dts/imxrt1050.dtsi
@@ -29,7 +29,7 @@ osc3M: osc3M {
 
 	soc {
 		lpuart1: serial@...84000 {
-			compatible = "fsl,imxrt1050-lpuart", "fsl,imx7ulp-lpuart";
+			compatible = "fsl,imxrt1050-lpuart";
 			reg = <0x40184000 0x4000>;
 			interrupts = <20>;
 			clocks = <&clks IMXRT1050_CLK_LPUART1>;
@@ -40,7 +40,6 @@ lpuart1: serial@...84000 {
 		iomuxc: pinctrl@...f8000 {
 			compatible = "fsl,imxrt1050-iomuxc";
 			reg = <0x401f8000 0x4000>;
-			fsl,mux_mask = <0x7>;
 		};
 
 		anatop: anatop@...d8000 {
@@ -83,7 +82,7 @@ edma1: dma-controller@...e8000 {
 		};
 
 		usdhc1: mmc@...c0000 {
-			compatible = "fsl,imxrt1050-usdhc", "fsl,imx6sl-usdhc";
+			compatible = "fsl,imxrt1050-usdhc";
 			reg = <0x402c0000 0x4000>;
 			interrupts = <110>;
 			clocks = <&clks IMXRT1050_CLK_IPG_PDOF>,
@@ -150,11 +149,11 @@ gpio5: gpio@...c0000 {
 		};
 
 		gpt: timer@...ec000 {
-			compatible = "fsl,imxrt1050-gpt", "fsl,imx6dl-gpt", "fsl,imx6sl-gpt";
+			compatible = "fsl,imxrt1050-gpt", "fsl,imx6dl-gpt";
 			reg = <0x401ec000 0x4000>;
 			interrupts = <100>;
-			clocks = <&osc3M>;
-			clock-names = "per";
+			clocks = <&osc3M>, <&osc3M>;
+			clock-names = "ipg", "per";
 		};
 	};
 };
-- 
2.37.2