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Message-ID: <20221107120611.vutsgpgpcorsgzwp@houat>
Date:   Mon, 7 Nov 2022 13:06:11 +0100
From:   Maxime Ripard <maxime@...no.tech>
To:     David Lechner <david@...hnology.com>
Cc:     Stephen Boyd <sboyd@...nel.org>,
        Maxime Coquelin <mcoquelin.stm32@...il.com>,
        Chen-Yu Tsai <wens@...e.org>, Daniel Vetter <daniel@...ll.ch>,
        Nicolas Ferre <nicolas.ferre@...rochip.com>,
        Thierry Reding <thierry.reding@...il.com>,
        Jaroslav Kysela <perex@...ex.cz>,
        Shawn Guo <shawnguo@...nel.org>,
        Fabio Estevam <festevam@...il.com>,
        Ulf Hansson <ulf.hansson@...aro.org>,
        Claudiu Beznea <claudiu.beznea@...rochip.com>,
        Michael Turquette <mturquette@...libre.com>,
        Dinh Nguyen <dinguyen@...nel.org>,
        Paul Cercueil <paul@...pouillou.net>,
        Chunyan Zhang <zhang.lyra@...il.com>,
        Manivannan Sadhasivam <mani@...nel.org>,
        Andreas Färber <afaerber@...e.de>,
        Jonathan Hunter <jonathanh@...dia.com>,
        Abel Vesa <abelvesa@...nel.org>,
        Charles Keepax <ckeepax@...nsource.cirrus.com>,
        Alessandro Zummo <a.zummo@...ertech.it>,
        Peter De Schrijver <pdeschrijver@...dia.com>,
        Orson Zhai <orsonzhai@...il.com>,
        Alexandre Torgue <alexandre.torgue@...s.st.com>,
        Prashant Gaikwad <pgaikwad@...dia.com>,
        Liam Girdwood <lgirdwood@...il.com>,
        Alexandre Belloni <alexandre.belloni@...tlin.com>,
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        Matthias Brugger <matthias.bgg@...il.com>,
        Richard Fitzgerald <rf@...nsource.cirrus.com>,
        Vinod Koul <vkoul@...nel.org>,
        NXP Linux Team <linux-imx@....com>,
        Sekhar Nori <nsekhar@...com>,
        Kishon Vijay Abraham I <kishon@...nel.org>,
        Linus Walleij <linus.walleij@...aro.org>,
        Takashi Iwai <tiwai@...e.com>,
        David Airlie <airlied@...il.com>,
        Luca Ceresoli <luca.ceresoli@...tlin.com>,
        Jernej Skrabec <jernej.skrabec@...il.com>,
        Pengutronix Kernel Team <kernel@...gutronix.de>,
        Baolin Wang <baolin.wang@...ux.alibaba.com>,
        Sascha Hauer <s.hauer@...gutronix.de>,
        Mark Brown <broonie@...nel.org>,
        Max Filippov <jcmvbkbc@...il.com>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        linux-stm32@...md-mailman.stormreply.com,
        alsa-devel@...a-project.org, linux-mediatek@...ts.infradead.org,
        linux-phy@...ts.infradead.org, linux-mips@...r.kernel.org,
        linux-renesas-soc@...r.kernel.org,
        linux-actions@...ts.infradead.org, linux-clk@...r.kernel.org,
        AngeloGioacchino Del Regno 
        <angelogioacchino.delregno@...labora.com>,
        patches@...nsource.cirrus.com, linux-tegra@...r.kernel.org,
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        dri-devel@...ts.freedesktop.org
Subject: Re: [PATCH v2 21/65] clk: davinci: da8xx-cfgchip: Add a
 determine_rate hook

Hi David,

On Fri, Nov 04, 2022 at 11:45:17AM -0500, David Lechner wrote:
> On 11/4/22 8:17 AM, Maxime Ripard wrote:
> > The Davinci DA8xxx cfgchip mux clock implements a mux with a set_parent
> > hook, but doesn't provide a determine_rate implementation.
> > 
> > This is a bit odd, since set_parent() is there to, as its name implies,
> > change the parent of a clock. However, the most likely candidate to
> > trigger that parent change is a call to clk_set_rate(), with
> > determine_rate() figuring out which parent is the best suited for a
> > given rate.
> > 
> > The other trigger would be a call to clk_set_parent(), but it's far less
> > used, and it doesn't look like there's any obvious user for that clock.
> > 
> > So, the set_parent hook is effectively unused, possibly because of an
> > oversight. However, it could also be an explicit decision by the
> > original author to avoid any reparenting but through an explicit call to
> > clk_set_parent().
> 
> 
> The parent is defined in the device tree and is not expected to change
> at runtime, so if I am understanding the patch correctly, setting the
> CLK_SET_RATE_NO_REPARENT flag seems correct.

Is that an acked-by/reviewed-by?

Thanks!
Maxime

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