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Message-Id: <166779074255.500303.2589437465871812483.b4-ty@kernel.org>
Date: Sun, 6 Nov 2022 21:12:18 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: krzysztof.kozlowski+dt@...aro.org, devicetree@...r.kernel.org,
Rob Herring <robh+dt@...nel.org>,
linux-arm-msm@...r.kernel.org, linux-gpio@...r.kernel.org,
konrad.dybcio@...ainline.org,
Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>,
linux-kernel@...r.kernel.org, linus.walleij@...aro.org,
srinivas.kandagatla@...aro.org, Andy Gross <agross@...nel.org>
Subject: Re: (subset) [PATCH v2 00/12] pinctrl/arm64: qcom: continued - fix Qualcomm LPASS pinctrl schema warnings
On Tue, 27 Sep 2022 17:34:17 +0200, Krzysztof Kozlowski wrote:
> Changes since v1
> ================
> 1. Reorder patches - DTS first.
> 2. Correct commit msg in two binding patches, as suggested by Rob.
> 3. Add tags.
>
> Overview
> ========
> This is the *second*, independent patchset around Qualcomm pinctrl in recent days:
> 1. First round of TLMM fixes: merged
> 2. LPASS fixes: *this patchset*
> 3. ARMv7 TLMM fixes: https://lore.kernel.org/all/20220926074415.53100-1-krzysztof.kozlowski@linaro.org/
> 4. ARMv8 remaining TLMM fixes: https://lore.kernel.org/linux-devicetree/20220925110608.145728-1-krzysztof.kozlowski@linaro.org/T/#t
>
> [...]
Applied, thanks!
[01/12] arm64: dts: qcom: sc7280: drop clock-cells from LPASS TLMM
commit: 67cb6e988f8937105560c782bf04520c3d0db841
[02/12] arm64: dts: qcom: sc7280: align LPASS pin configuration with DT schema
commit: 886a50bd031aae7b6880030a4076a146d0429492
[03/12] arm64: dts: qcom: sm8250: correct LPASS pin pull down
commit: 195a0a11d66d6c696cbcf398d6bc3f3a3a462f7c
[04/12] arm64: dts: qcom: sm8250: align LPASS pin configuration with DT schema
commit: 031f5436c9b7209446eb90fe512d1e379ace0e1b
Best regards,
--
Bjorn Andersson <andersson@...nel.org>
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