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Message-Id: <20221107135825.583877-2-herve.codina@bootlin.com>
Date: Mon, 7 Nov 2022 14:58:19 +0100
From: Herve Codina <herve.codina@...tlin.com>
To: Geert Uytterhoeven <geert+renesas@...der.be>,
Michael Turquette <mturquette@...libre.com>,
Stephen Boyd <sboyd@...nel.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Herve Codina <herve.codina@...tlin.com>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Magnus Damm <magnus.damm@...il.com>,
Gareth Williams <gareth.williams.jx@...esas.com>
Cc: linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-usb@...r.kernel.org,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
Miquel Raynal <miquel.raynal@...tlin.com>
Subject: [PATCH 1/7] soc: renesas: r9a06g032-sysctrl: Export function to get H2MODE from CFG_USB register
The CFG_USB register is located within the system controller.
We need a helper to get the H2MODE value from the CFG_USB register
without syscon.
Signed-off-by: Herve Codina <herve.codina@...tlin.com>
---
drivers/clk/renesas/r9a06g032-clocks.c | 18 ++++++++++++++++++
include/linux/soc/renesas/r9a06g032-sysctrl.h | 2 ++
2 files changed, 20 insertions(+)
diff --git a/drivers/clk/renesas/r9a06g032-clocks.c b/drivers/clk/renesas/r9a06g032-clocks.c
index 1488c9d6e639..c07131c47a9f 100644
--- a/drivers/clk/renesas/r9a06g032-clocks.c
+++ b/drivers/clk/renesas/r9a06g032-clocks.c
@@ -25,6 +25,8 @@
#include <linux/spinlock.h>
#include <dt-bindings/clock/r9a06g032-sysctrl.h>
+#define R9A06G032_SYSCTRL_USB 0x00
+#define R9A06G032_SYSCTRL_USB_H2MODE (1<<1)
#define R9A06G032_SYSCTRL_DMAMUX 0xA0
struct r9a06g032_gate {
@@ -341,6 +343,22 @@ int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val)
}
EXPORT_SYMBOL_GPL(r9a06g032_sysctrl_set_dmamux);
+
+/* Exported helper to get the H2MODE bit from USB register */
+int r9a06g032_sysctrl_get_usb_h2mode(bool *h2mode)
+{
+ u32 usb;
+
+ if (!sysctrl_priv)
+ return -EPROBE_DEFER;
+
+ usb = readl(sysctrl_priv->reg + R9A06G032_SYSCTRL_USB);
+ *h2mode = (usb & R9A06G032_SYSCTRL_USB_H2MODE) ? true : false;
+
+ return 0;
+}
+EXPORT_SYMBOL_GPL(r9a06g032_sysctrl_get_usb_h2mode);
+
/* register/bit pairs are encoded as an uint16_t */
static void
clk_rdesc_set(struct r9a06g032_priv *clocks,
diff --git a/include/linux/soc/renesas/r9a06g032-sysctrl.h b/include/linux/soc/renesas/r9a06g032-sysctrl.h
index 066dfb15cbdd..095e00f27309 100644
--- a/include/linux/soc/renesas/r9a06g032-sysctrl.h
+++ b/include/linux/soc/renesas/r9a06g032-sysctrl.h
@@ -4,8 +4,10 @@
#ifdef CONFIG_CLK_R9A06G032
int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val);
+int r9a06g032_sysctrl_get_usb_h2mode(bool *h2mode);
#else
static inline int r9a06g032_sysctrl_set_dmamux(u32 mask, u32 val) { return -ENODEV; }
+static inline int r9a06g032_sysctrl_get_usb_h2mode(bool *h2mode) { return -ENODEV; }
#endif
#endif /* __LINUX_SOC_RENESAS_R9A06G032_SYSCTRL_H__ */
--
2.37.3
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