| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Message-Id: <20221107155825.1644604-2-pierre.gondois@arm.com>
Date: Mon, 7 Nov 2022 16:56:54 +0100
From: Pierre Gondois <pierre.gondois@....com>
To: linux-kernel@...r.kernel.org
Cc: Pierre Gondois <pierre.gondois@....com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Florian Fainelli <f.fainelli@...il.com>,
Broadcom internal kernel review list
<bcm-kernel-feedback-list@...adcom.com>,
Ray Jui <rjui@...adcom.com>,
Scott Branden <sbranden@...adcom.com>,
Tsahee Zidenberg <tsahee@...apurnalabs.com>,
Antoine Tenart <atenart@...nel.org>,
Brijesh Singh <brijeshkumar.singh@....com>,
Suravee Suthikulpanit <suravee.suthikulpanit@....com>,
Tom Lendacky <thomas.lendacky@....com>,
Neil Armstrong <neil.armstrong@...aro.org>,
Kevin Hilman <khilman@...libre.com>,
Jerome Brunet <jbrunet@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Khuong Dinh <khuong@...amperecomputing.com>,
Liviu Dudau <liviu.dudau@....com>,
Sudeep Holla <sudeep.holla@....com>,
Lorenzo Pieralisi <lpieralisi@...nel.org>,
William Zhang <william.zhang@...adcom.com>,
Anand Gore <anand.gore@...adcom.com>,
Kursad Oney <kursad.oney@...adcom.com>,
Rafał Miłecki <rafal@...ecki.pl>,
Alim Akhtar <alim.akhtar@...sung.com>,
Shawn Guo <shawnguo@...nel.org>, Li Yang <leoyang.li@....com>,
Sascha Hauer <s.hauer@...gutronix.de>,
Pengutronix Kernel Team <kernel@...gutronix.de>,
Fabio Estevam <festevam@...il.com>,
NXP Linux Team <linux-imx@....com>,
Chester Lin <clin@...e.com>,
Andreas Färber <afaerber@...e.de>,
Matthias Brugger <mbrugger@...e.com>,
NXP S32 Linux Team <s32@....com>,
Wei Xu <xuwei5@...ilicon.com>, Chanho Min <chanho.min@....com>,
Andrew Lunn <andrew@...n.ch>,
Gregory Clement <gregory.clement@...tlin.com>,
Sebastian Hesselbarth <sebastian.hesselbarth@...il.com>,
Lars Povlsen <lars.povlsen@...rochip.com>,
Steen Hegelund <Steen.Hegelund@...rochip.com>,
Daniel Machon <daniel.machon@...rochip.com>,
UNGLinuxDriver@...rochip.com, Avi Fishman <avifishman70@...il.com>,
Tomer Maimon <tmaimon77@...il.com>,
Tali Perry <tali.perry1@...il.com>,
Patrick Venture <venture@...gle.com>,
Nancy Yuen <yuenn@...gle.com>,
Benjamin Fair <benjaminfair@...gle.com>,
Thierry Reding <thierry.reding@...il.com>,
Jonathan Hunter <jonathanh@...dia.com>,
Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Geert Uytterhoeven <geert+renesas@...der.be>,
Magnus Damm <magnus.damm@...il.com>,
Heiko Stuebner <heiko@...ech.de>,
Kunihiko Hayashi <hayashi.kunihiko@...ionext.com>,
Masami Hiramatsu <mhiramat@...nel.org>,
Jisheng Zhang <jszhang@...nel.org>, Nishanth Menon <nm@...com>,
Vignesh Raghavendra <vigneshr@...com>,
Tero Kristo <kristo@...nel.org>,
Viorel Suman <viorel.suman@....com>,
Abel Vesa <abelvesa@...nel.org>, Peng Fan <peng.fan@....com>,
Ming Qian <ming.qian@....com>,
Shenwei Wang <shenwei.wang@....com>,
Adam Ford <aford173@...il.com>,
Tim Harvey <tharvey@...eworks.com>,
Lucas Stach <l.stach@...gutronix.de>,
Richard Zhu <hongxing.zhu@....com>, Li Jun <jun.li@....com>,
Markus Niebel <Markus.Niebel@...tq-group.com>,
Marco Felsch <m.felsch@...gutronix.de>,
Joakim Zhang <qiangqing.zhang@....com>,
Marek Vasut <marex@...x.de>,
Laurent Pinchart <laurent.pinchart@...asonboard.com>,
Alexander Stein <alexander.stein@...tq-group.com>,
Paul Elder <paul.elder@...asonboard.com>,
Martin Kepplinger <martink@...teo.de>,
David Heidelberg <david@...t.cz>,
Liu Ying <victor.liu@....com>,
Oliver Graute <oliver.graute@...oconnector.com>,
Dong Aisheng <aisheng.dong@....com>,
Clark Wang <xiaoning.wang@....com>,
Jacky Bai <ping.bai@....com>,
Chris Packham <chris.packham@...iedtelesis.co.nz>,
Vadym Kochan <vadym.kochan@...ision.eu>,
Sameer Pujar <spujar@...dia.com>,
Mikko Perttunen <mperttunen@...dia.com>,
Akhil R <akhilrajeev@...dia.com>,
Sumit Gupta <sumitg@...dia.com>,
Prathamesh Shete <pshete@...dia.com>,
Diogo Ivo <diogo.ivo@...nico.ulisboa.pt>,
Vidya Sagar <vidyas@...dia.com>,
Ashish Mhetre <amhetre@...dia.com>,
Johan Jonker <jbx6244@...il.com>,
Christopher Obbard <chris.obbard@...labora.com>,
Ezequiel Garcia <ezequiel@...guardiasur.com.ar>,
Aswani Reddy <aswani.reddy@...sung.com>,
Shashank Prashar <s.prashar@...sung.com>,
Arnd Bergmann <arnd@...db.de>, devicetree@...r.kernel.org,
linux-rpi-kernel@...ts.infradead.org,
linux-arm-kernel@...ts.infradead.org,
linux-amlogic@...ts.infradead.org,
linux-samsung-soc@...r.kernel.org,
linux-mediatek@...ts.infradead.org, openbmc@...ts.ozlabs.org,
linux-tegra@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-realtek-soc@...ts.infradead.org,
linux-renesas-soc@...r.kernel.org,
linux-rockchip@...ts.infradead.org
Subject: [PATCH v2 01/23] arm64: dts: Update cache properties for amazon
The DeviceTree Specification v0.3 specifies that the cache node
'compatible' and 'cache-level' properties are 'required'. Cf.
s3.8 Multi-level and Shared Cache Nodes
The 'cache-unified' property should be present if one of the
properties for unified cache is present ('cache-size', ...).
Update the Device Trees accordingly.
Signed-off-by: Pierre Gondois <pierre.gondois@....com>
---
arch/arm64/boot/dts/amazon/alpine-v3.dtsi | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/arch/arm64/boot/dts/amazon/alpine-v3.dtsi b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi
index 73a352ea8fd5..ba7e56dc85db 100644
--- a/arch/arm64/boot/dts/amazon/alpine-v3.dtsi
+++ b/arch/arm64/boot/dts/amazon/alpine-v3.dtsi
@@ -246,6 +246,7 @@ cpu@303 {
cluster0_l2: cache@0 {
compatible = "cache";
+ cache-unified;
cache-size = <0x200000>;
cache-line-size = <64>;
cache-sets = <2048>;
@@ -254,6 +255,7 @@ cluster0_l2: cache@0 {
cluster1_l2: cache@100 {
compatible = "cache";
+ cache-unified;
cache-size = <0x200000>;
cache-line-size = <64>;
cache-sets = <2048>;
@@ -262,6 +264,7 @@ cluster1_l2: cache@100 {
cluster2_l2: cache@200 {
compatible = "cache";
+ cache-unified;
cache-size = <0x200000>;
cache-line-size = <64>;
cache-sets = <2048>;
@@ -270,6 +273,7 @@ cluster2_l2: cache@200 {
cluster3_l2: cache@300 {
compatible = "cache";
+ cache-unified;
cache-size = <0x200000>;
cache-line-size = <64>;
cache-sets = <2048>;
--
2.25.1
Powered by blists - more mailing lists