linux-kernel - Re: [PATCH 0/3] Check enumeration before MSR save/restore

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Message-ID: <aa8f5b80-b94e-b685-ed65-8b9c8f453832@redhat.com>
Date:   Tue, 8 Nov 2022 19:16:00 +0100
From:   Hans de Goede <hdegoede@...hat.com>
To:     Pawan Gupta <pawan.kumar.gupta@...ux.intel.com>,
        Thomas Gleixner <tglx@...utronix.de>,
        Ingo Molnar <mingo@...hat.com>, Borislav Petkov <bp@...en8.de>,
        Dave Hansen <dave.hansen@...ux.intel.com>, x86@...nel.org,
        "H. Peter Anvin" <hpa@...or.com>,
        "Rafael J. Wysocki" <rafael@...nel.org>,
        Pavel Machek <pavel@....cz>,
        Andrew Cooper <Andrew.Cooper3@...rix.com>, degoede@...hat.com
Cc:     linux-kernel@...r.kernel.org, linux-pm@...r.kernel.org,
        Daniel Sneddon <daniel.sneddon@...ux.intel.com>,
        antonio.gomez.iglesias@...ux.intel.com
Subject: Re: [PATCH 0/3] Check enumeration before MSR save/restore

Hi All,

On 9/13/22 01:38, Pawan Gupta wrote:
> Hi,
> 
> This patchset is to fix the "unchecked MSR access error" [1] during S3
> resume. Patch 1/3 adds a feature bit for MSR_IA32_TSX_CTRL.
> 
> Patch 2/3 adds a feature bit for MSR_AMD64_LS_CFG.
> 
> Patch 3/3 adds check for feature bit before adding any speculation
> control MSR to the list of MSRs to save/restore.
> 
> [1] https://lore.kernel.org/lkml/20220906201743.436091-1-hdegoede@redhat.com/
> 
> Pawan Gupta (3):
>   x86/tsx: Add feature bit for TSX control MSR support
>   x86/cpu/amd: Add feature bit for MSR_AMD64_LS_CFG enumeration
>   x86/pm: Add enumeration check before spec MSRs save/restore setup

What is the status of this series ?

To me this seems like a sensible way to solve the problem which
I reported and other similar problems...

Regards,

Hans