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Message-ID: <20221108033209.22751-2-allen-kh.cheng@mediatek.com>
Date:   Tue, 8 Nov 2022 11:32:03 +0800
From:   Allen-KH Cheng <allen-kh.cheng@...iatek.com>
To:     Wim Van Sebroeck <wim@...ux-watchdog.org>,
        Guenter Roeck <linux@...ck-us.net>,
        Krzysztof Kozlowski <krzk+dt@...nel.org>,
        Matthias Brugger <matthias.bgg@...il.com>,
        Rob Herring <robh+dt@...nel.org>
CC:     <nfraprado@...labora.com>,
        <angelogioacchino.delregno@...labora.com>,
        <Project_Global_Chrome_Upstream_Group@...iatek.com>,
        <devicetree@...r.kernel.org>, <linux-watchdog@...r.kernel.org>,
        <linux-arm-kernel@...ts.infradead.org>,
        <linux-kernel@...r.kernel.org>,
        <linux-mediatek@...ts.infradead.org>,
        Allen-KH Cheng <allen-kh.cheng@...iatek.com>
Subject: [PATCH v5 1/7] arm64: dts: mediatek: mt8186: Fix watchdog compatible

From: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>

MT8186's watchdog embeds a reset controller and needs only the
mediatek,mt8186-wdt compatible string as the MT6589 one is there
for watchdogs that don't have any reset controller capability.

Fixes: 2e78620b1350 ("arm64: dts: Add MediaTek MT8186 dts and evaluation board and Makefile")
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@...labora.com>
Co-developed-by: Allen-KH Cheng <allen-kh.cheng@...iatek.com>
Signed-off-by: Allen-KH Cheng <allen-kh.cheng@...iatek.com>
Reviewed-by: NĂ­colas F. R. A. Prado <nfraprado@...labora.com>
---
 arch/arm64/boot/dts/mediatek/mt8186.dtsi | 3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/arch/arm64/boot/dts/mediatek/mt8186.dtsi b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
index 64693c17af9e..e4366144cca5 100644
--- a/arch/arm64/boot/dts/mediatek/mt8186.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8186.dtsi
@@ -330,8 +330,7 @@
 		};
 
 		watchdog: watchdog@...07000 {
-			compatible = "mediatek,mt8186-wdt",
-				     "mediatek,mt6589-wdt";
+			compatible = "mediatek,mt8186-wdt";
 			mediatek,disable-extrst;
 			reg = <0 0x10007000 0 0x1000>;
 			#reset-cells = <1>;
-- 
2.18.0

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