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Message-ID: <3c7da7fd-402f-c74f-c96c-0e88828eab58@zhaoxin.com>
Date:   Tue, 8 Nov 2022 16:18:02 +0800
From:   silviazhaooc <silviazhao-oc@...oxin.com>
To:     Borislav Petkov <bp@...en8.de>
CC:     <peterz@...radead.org>, <mingo@...hat.com>, <acme@...nel.org>,
        <mark.rutland@....com>, <alexander.shishkin@...ux.intel.com>,
        <jolsa@...nel.org>, <namhyung@...nel.org>, <tglx@...utronix.de>,
        <dave.hansen@...ux.intel.com>, <x86@...nel.org>, <hpa@...or.com>,
        <linux-perf-users@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        "Cobe Chen(BJ-RD)" <CobeChen@...oxin.com>,
        "Louis Qi(BJ-RD)" <LouisQi@...oxin.com>,
        "Silvia Zhao(BJ-RD)" <SilviaZhao@...oxin.com>,
        <8vvbbqzo567a@...pam.xutrox.com>
Subject: Fwd: [PATCH] x86/perf: Fixed kernel panic during boot on Nano
 processor.


On 2022/11/3 18:07, Borislav Petkov wrote:
> 
> On Thu, Nov 03, 2022 at 11:23:04AM +0800, silviazhao-oc wrote:
>> Nano processor may not fully support rdpmc instruction,
> 
> What does that even mean? Not fully support?

rdpmc instruction on Nano processor has a limitation that it cannot 
access fixed performance counter, while it can read general pmc counter 
successfully.

> 
>> it works well for reading general pmc counter, but will lead
>> GP(general protection) when accessing fixed pmc counter.
> 
> RDPMC will #GP when the perf counter specified cannot be read.
> 
> AFAICT, that is RCX: 0000000040000001 which looks like perf counter index 1 with INTEL_PMC_FIXED_RDPMC_BASE ORed in.

Yes, RCX: 0000000040000001 indicates we are accessing fixed performance 
counters with index 1.

> 
>> Furthermore, family/mode information is same between Nano processor
>> and ZX-C processor, it leads to zhaoxin pmu driver is wrongly loaded
>> for Nano processor, which resulting boot kernal fail.
> 
> So *that* is the real problem - it tries to access perf counters thinking it is running on architectural perf counters implementation but nano doesn't have that.

Actually Nano do support architectural perf counters. But due to rdpmc 
instruction issue, accessing fixed counters via rdpmc will cause GP.

> 
>> To solve this problem, stepping information will be checked to
>> distinguish between Nano processor and ZX-C processor.
> 
> Why doesn't that ZXC thing doesn't have a CPUID flag to check instead of looking at models and steppings and thus confusing it with a nano CPU?

Nano and ZXC both support architectural perf counters, and they both 
have a CPUID flag to check that. The difference is Nano has rdpmc issue 
while ZXC does not, which cannot be checked through CPUID.

> 
>> [https://bugzilla.kernel.org/show_bug.cgi?id=212389]
>>
>> Reported-by: Arjan <8vvbbqzo567a@...pam.xutrox.com>
> 
> Does Arjan have a last name?

Sorry, I don't know Arjan either.

> 
>> Signed-off-by: silviazhao-oc <silviazhao-oc@...oxin.com>
> 
> I'm assuming your name is properly spelled "Silvia Zhao" and not in a single word with a "-oc" string appended at the end, yes?

Yes, Silvia Zhao is my name.
Thx for your kindly reply.

> 
> Thx.
> 
> --
> Regards/Gruss,
>      Boris.
> 
> https://people.kernel.org/tglx/notes-about-netiquette

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