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Message-Id: <166787084677.599230.9490503702651891752.b4-ty@kernel.org>
Date: Mon, 7 Nov 2022 19:27:25 -0600
From: Bjorn Andersson <andersson@...nel.org>
To: devicetree@...r.kernel.org, robh+dt@...nel.org,
linus.walleij@...aro.org, konrad.dybcio@...ainline.org,
krzysztof.kozlowski+dt@...aro.org, agross@...nel.org,
linux-gpio@...r.kernel.org, linux-kernel@...r.kernel.org,
krzysztof.kozlowski@...aro.org, linux-arm-msm@...r.kernel.org
Subject: Re: (subset) [PATCH v3 1/3] arm64: dts: qcom: msm8994: Correct SPI10 CS pin
On Tue, 18 Oct 2022 11:54:48 -0400, Krzysztof Kozlowski wrote:
> The GPIO55 is part of SPI10 pins, not its chip-select. Probably the
> intention was to use one of dedicated chip-select GPIOs: 47 or 67.
> GPIO47 is used for UART2, so choose GPIO67.
>
>
Applied, thanks!
[1/3] arm64: dts: qcom: msm8994: Correct SPI10 CS pin
commit: 5d76dfb86850893f2506e15a1dc68977c3adc79f
[2/3] arm64: dts: qcom: msm8994: Align TLMM pin configuration with DT schema
commit: 9d7d01da9a24a8e37fa156d93dbea893a0665f94
Best regards,
--
Bjorn Andersson <andersson@...nel.org>
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