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Message-Id: <31ddc1508e01618db62bb9421d15745d525a6d10.1667911321.git.Sandor.yu@nxp.com>
Date:   Tue,  8 Nov 2022 21:00:10 +0800
From:   Sandor Yu <Sandor.yu@....com>
To:     dri-devel@...ts.freedesktop.org, devicetree@...r.kernel.org,
        linux-arm-kernel@...ts.infradead.org, linux-kernel@...r.kernel.org,
        linux-phy@...ts.infradead.org, andrzej.hajda@...el.com,
        neil.armstrong@...aro.org, robert.foss@...aro.org,
        Laurent.pinchart@...asonboard.com, jonas@...boo.se,
        jernej.skrabec@...il.com, vkoul@...nel.org
Cc:     robh+dt@...nel.org, krzysztof.kozlowski+dt@...aro.org,
        shawnguo@...nel.org, s.hauer@...gutronix.de, kernel@...gutronix.de,
        linux-imx@....com, tzimmermann@...e.de, lyude@...hat.com,
        Sandor.yu@....com, javierm@...hat.com,
        ville.syrjala@...ux.intel.com, sam@...nborg.org,
        jani.nikula@...el.com, maxime@...no.tech,
        penguin-kernel@...ove.SAKURA.ne.jp, oliver.brown@....com
Subject: [PATCH v3 07/10] dt-bindings: phy: Add Cadence HDP-TX DP PHY

Add bindings for Cadence HDP-TX DisplayPort PHY.

Signed-off-by: Sandor Yu <Sandor.yu@....com>
---
 .../bindings/phy/cdns,hdptx-dp-phy.yaml       | 66 +++++++++++++++++++
 1 file changed, 66 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/phy/cdns,hdptx-dp-phy.yaml

diff --git a/Documentation/devicetree/bindings/phy/cdns,hdptx-dp-phy.yaml b/Documentation/devicetree/bindings/phy/cdns,hdptx-dp-phy.yaml
new file mode 100644
index 000000000000..8f9b8ba7d1c6
--- /dev/null
+++ b/Documentation/devicetree/bindings/phy/cdns,hdptx-dp-phy.yaml
@@ -0,0 +1,66 @@
+# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/phy/cdns,hdptx-dp-phy.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cadence HDP-TX(HDMI/DisplayPort) PHY for DisplayPort protocol
+
+maintainers:
+  - Sandor Yu <sandor.yu@....com>
+
+properties:
+  compatible:
+    enum:
+      - cdns,hdptx-dp-phy
+
+  reg:
+    maxItems: 1
+
+  clocks:
+    items:
+      description:
+        PHY reference clock.
+
+  clock-names:
+    items:
+      - const: refclk
+
+  "#phy-cells":
+    const: 0
+
+  cdns,num-lanes:
+    description:
+      Number of lanes.
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [1, 2, 3, 4]
+    default: 4
+
+  cdns,max-bit-rate:
+    description:
+      Maximum DisplayPort link bit rate to use, in Mbps
+    $ref: /schemas/types.yaml#/definitions/uint32
+    enum: [2160, 2430, 2700, 3240, 4320, 5400]
+    default: 5400
+
+required:
+  - compatible
+  - reg
+  - clocks
+  - clock-names
+  - "#phy-cells"
+
+additionalProperties: false
+
+examples:
+  - |
+    #include <dt-bindings/phy/phy.h>
+    dp_phy: phy@...00000 {
+        compatible = "cdns,hdptx-dp-phy";
+        reg = <0x32c00000 0x100000>;
+        #phy-cells = <0>;
+        clocks = <&hdmi_phy_27m>;
+        clock-names = "refclk";
+        cdns,num-lanes = <4>;
+        cdns,max-bit-rate = <5400>;
+    };
-- 
2.34.1

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