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Message-ID: <CAMuHMdWTJf24XR+KR8yVJOnfpgs-PkUf9b8B=PX9Dd4mfawD5Q@mail.gmail.com>
Date: Tue, 8 Nov 2022 17:12:29 +0100
From: Geert Uytterhoeven <geert@...ux-m68k.org>
To: "Lad, Prabhakar" <prabhakar.csengg@...il.com>
Cc: Paul Walmsley <paul.walmsley@...ive.com>,
Palmer Dabbelt <palmer@...belt.com>,
Albert Ou <aou@...s.berkeley.edu>,
Magnus Damm <magnus.damm@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Heiko Stuebner <heiko@...ech.de>,
Conor Dooley <conor.dooley@...rochip.com>,
Guo Ren <guoren@...nel.org>, Anup Patel <anup@...infault.org>,
Atish Patra <atishp@...osinc.com>,
Heinrich Schuchardt <heinrich.schuchardt@...onical.com>,
devicetree@...r.kernel.org, linux-riscv@...ts.infradead.org,
linux-kernel@...r.kernel.org, linux-renesas-soc@...r.kernel.org,
Biju Das <biju.das.jz@...renesas.com>,
Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
Subject: Re: [PATCH v5 7/7] riscv: configs: defconfig: Enable Renesas RZ/Five SoC
Hi Prabhakar,
On Tue, Nov 8, 2022 at 5:07 PM Lad, Prabhakar
<prabhakar.csengg@...il.com> wrote:
> On Tue, Nov 8, 2022 at 3:52 PM Geert Uytterhoeven <geert@...ux-m68k.org> wrote:
> > On Fri, Oct 28, 2022 at 6:59 PM Prabhakar <prabhakar.csengg@...il.com> wrote:
> > > From: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > >
> > > Enable Renesas RZ/Five SoC config in defconfig. It allows the default
> > > upstream kernel to boot on RZ/Five SMARC EVK board.
> > >
> > > Alongside enable SERIAL_SH_SCI config so that the serial driver used by
> > > RZ/Five SoC is built-in.
> > >
> > > Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@...renesas.com>
> > > Reviewed-by: Conor Dooley <conor.dooley@...rochip.com>
> > > Reviewed-by: Geert Uytterhoeven <geert+renesas@...der.be>
> > > ---
> > > v4 -> v5
> > > * No change
> > >
> > > v3 -> v4
> > > * Explicitly enabled ARCH_R9A07G043 config (note I have restored the RB
> > > tags with this change)
> > > * Used riscv instead of RISC-V in subject line
> >
> > Thanks for the update!
> >
> > > --- a/arch/riscv/configs/defconfig
> > > +++ b/arch/riscv/configs/defconfig
> > > @@ -29,6 +29,8 @@ CONFIG_SOC_MICROCHIP_POLARFIRE=y
> > > CONFIG_SOC_SIFIVE=y
> > > CONFIG_SOC_STARFIVE=y
> > > CONFIG_SOC_VIRT=y
> > > +CONFIG_ARCH_RENESAS=y
> > > +CONFIG_ARCH_R9A07G043=y
> >
> > You forgot to refresh after moving ARCH_RENESAS in v5 of "riscv:
> > Kconfig.socs: Add ARCH_RENESAS kconfig option", and after relying on
> > ARCH_R9A07G043 in drivers/soc/renesas/Kconfig.
> >
> Sorry I missed your point here, could you please elaborate.
I mean that the options have moved, so you should update
your patch like this:
--- a/arch/riscv/configs/defconfig
+++ b/arch/riscv/configs/defconfig
@@ -26,11 +26,10 @@ CONFIG_EXPERT=y
# CONFIG_SYSFS_SYSCALL is not set
CONFIG_PROFILING=y
CONFIG_SOC_MICROCHIP_POLARFIRE=y
+CONFIG_ARCH_RENESAS=y
CONFIG_SOC_SIFIVE=y
CONFIG_SOC_STARFIVE=y
CONFIG_SOC_VIRT=y
-CONFIG_ARCH_RENESAS=y
-CONFIG_ARCH_R9A07G043=y
CONFIG_SMP=y
CONFIG_HOTPLUG_CPU=y
CONFIG_PM=y
@@ -163,6 +159,7 @@ CONFIG_MAILBOX=y
CONFIG_RPMSG_CHAR=y
CONFIG_RPMSG_CTRL=y
CONFIG_RPMSG_VIRTIO=y
+CONFIG_ARCH_R9A07G043=y
CONFIG_EXT4_FS=y
CONFIG_EXT4_FS_POSIX_ACL=y
CONFIG_EXT4_FS_SECURITY=y
> > > CONFIG_SMP=y
> > > CONFIG_HOTPLUG_CPU=y
> > > CONFIG_PM=y
> >
> > PM and GPIOLIB are auto-selected by ARCH_R9A07G043 (through ARCH_RZG2L)
> > resp. SOC_RENESAS, so they can be dropped. But it's better to do this
> > after the release of v6.2-rc1, when all pieces have fallen together.
> >
> Are you suggesting dropping it from defconfig?
Yes, but not right now, as that would make it depend on my
renesas-drivers-for-v6.2 branch to keep them enabled.
Gr{oetje,eeting}s,
Geert
--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org
In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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