linux-kernel - [PATCH 04/12] dt-bindings: pinctrl: Add Cirrus Logic CS48L31/32/33

lists.openwall.net		lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC
Open Source and information security mailing list archives

Hash Suite for Android: free password hash cracker in your pocket

[<prev] [next>] [<thread-prev] [thread-next>] [day] [month] [year] [list]

Message-ID: <20221109165331.29332-5-rf@opensource.cirrus.com>
Date:   Wed, 9 Nov 2022 16:53:23 +0000
From:   Richard Fitzgerald <rf@...nsource.cirrus.com>
To:     <lee@...nel.org>, <robh+dt@...nel.org>,
        <krzysztof.kozlowski+dt@...aro.org>, <linus.walleij@...aro.org>,
        <broonie@...nel.org>, <tglx@...utronix.de>, <maz@...nel.org>
CC:     <alsa-devel@...a-project.org>, <devicetree@...r.kernel.org>,
        <linux-gpio@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
        <patches@...nsource.cirrus.com>,
        Richard Fitzgerald <rf@...nsource.cirrus.com>
Subject: [PATCH 04/12] dt-bindings: pinctrl: Add Cirrus Logic CS48L31/32/33

Codecs in this family have multiple digital I/O functions for audio,
DSP subsystem, GPIO and various special functions. All muxable pins
are selectable as either a GPIO or one of the available alternate
functions.

Signed-off-by: Richard Fitzgerald <rf@...nsource.cirrus.com>
---
 .../bindings/pinctrl/cirrus,cs48l32.yaml      | 98 +++++++++++++++++++
 1 file changed, 98 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/pinctrl/cirrus,cs48l32.yaml

diff --git a/Documentation/devicetree/bindings/pinctrl/cirrus,cs48l32.yaml b/Documentation/devicetree/bindings/pinctrl/cirrus,cs48l32.yaml
new file mode 100644
index 000000000000..b24fbae6a8f8
--- /dev/null
+++ b/Documentation/devicetree/bindings/pinctrl/cirrus,cs48l32.yaml
@@ -0,0 +1,98 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/pinctrl/cirrus,cs48l32.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Cirrus Logic CS48L32 audio codec pinctrl driver
+
+maintainers:
+  - patches@...nsource.cirrus.com
+
+description: |
+The Cirrus Logic CS48L32 codec has a number of GPIO functions for
+interfacing to external hardware. Certain groups of GPIO pins also
+have an alternate function.
+
+The properties for this driver exist within the parent MFD driver node.
+See the core bindings for the parent MFD driver for an example:
+
+    Documentation/devicetree/bindings/mfd/cirrus,cs48l32.yaml
+
+And the generic pinctrl bindings:
+
+    Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt
+
+properties:
+  pin-settings:
+    description:
+      One subnode is required to contain the default settings. It
+      contains an arbitrary number of configuration subnodes, one for
+      each group or pin configuration you want to apply as a default.
+    type: object
+    patternProperties:
+      '-pins$':
+        type: object
+        allOf:
+          - $ref: "pincfg-node.yaml#"
+          - $ref: "pinmux-node.yaml#"
+        properties:
+          groups:
+            description:
+              Name of one pin group to configure.
+            enum: [ asp1, asp2, in1-pdm, in2-pdm,
+                    gpio1, gpio2, gpio3, gpio4, gpio5, gpio6, gpio7,
+                    gpio8, gpio9, gpio10, gpio11, gpio12, gpio13,
+                    gpio14, gpio15, gpio16 ]
+
+          function:
+            description:
+              Name of function to assign to this group.
+            enum: [ asp1, asp2, in1-pdm, in2-pdm, spi2, io, dsp-gpio,
+                    irq1, fll1-clk, fll1-lock, opclk, opclk-dsp, uart,
+                    input-path-signal-detect,
+                    ultrasonic-in1-activity-detect, ultrasonic-in2-activity-detect,
+                    dma-ch0-programmable-transfer-complete,
+                    dma-ch1-programmable-transfer-complete,
+                    dma-ch2-programmable-transfer-complete,
+                    dma-ch3-programmable-transfer-complete,
+                    dma-ch4-programmable-transfer-complete,
+                    dma-ch5-programmable-transfer-complete,
+                    dma-ch6-programmable-transfer-complete,
+                    dma-ch7-programmable-transfer-complete,
+                    sample-rate-change-trigger-a, sample-rate-change-trigger-b,
+                    sample-rate-change-trigger-c, sample-rate-change-trigger-d,
+                    timer1-irq-ch1, timer1-irq-ch2, timer1-irq-ch3, timer1-irq-ch4,
+                    timer2-irq-ch1, timer2-irq-ch2, timer2-irq-ch3, timer2-irq-ch4,
+                    timer3-irq-ch1, timer3-irq-ch2, timer3-irq-ch3, timer3-irq-ch4,
+                    timer4-irq-ch1, timer4-irq-ch2, timer4-irq-ch3, timer4-irq-ch4,
+                    timer5-irq-ch1, timer5-irq-ch2, timer5-irq-ch3, timer5-irq-ch4,
+                    timer-1, timer-2, timer-3, timer-4, timer-5 ]
+
+          bias-disable: true
+
+          bias-bus-hold: true
+
+          bias-pull-up: true
+
+          bias-pull-down: true
+
+          drive-push-pull: true
+
+          drive-open-drain: true
+
+          drive-strength:
+            description:
+              Drive strength in mA.
+            enum: [ 4, 8 ]
+
+          output-low: true
+
+          output-high: true
+
+        additionalProperties: false
+
+        required:
+          - groups
+
+    additionalProperties: false
-- 
2.30.2