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Message-ID: <Y2uFTM/O0b39greO@wendy>
Date: Wed, 9 Nov 2022 10:47:40 +0000
From: Conor Dooley <conor.dooley@...rochip.com>
To: Uwe Kleine-König
<u.kleine-koenig@...gutronix.de>
CC: Thierry Reding <thierry.reding@...il.com>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Daire McNamara <daire.mcnamara@...rochip.com>,
<devicetree@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
<linux-pwm@...r.kernel.org>, <linux-riscv@...ts.infradead.org>
Subject: Re: [PATCH v11 4/4] MAINTAINERS: add pwm to PolarFire SoC entry
On Wed, Nov 09, 2022 at 10:35:25AM +0100, Uwe Kleine-König wrote:
> On Fri, Oct 07, 2022 at 12:35:13PM +0100, Conor Dooley wrote:
> > Add the newly introduced pwm driver to the existing PolarFire SoC entry.
> >
> > Signed-off-by: Conor Dooley <conor.dooley@...rochip.com>
>
> Acked-by: Uwe Kleine-König <u.kleine-koenig@...gutronix.de>
>
> I assume you will rework the series and resend this one with the driver
> patche. Applying patch #4 alone doesn't make sense, so I'm marking this
> one as "changes requested", too, in the PWM patchwork instance.
>
> IMHO patches #1 and #2 make sense to be applied already without the
> driver given the binding is already there. I assume they will go in via
> the riscv tree, so I will mark these two as "handled elsewhere".
Right. Makes sense to me - I'll take the dt-binding & the dt via the
riscv (or soc, we're changing things up there [a]) tree.
Thanks,
Conor.
[a] - https://lore.kernel.org/linux-riscv/mhng-e4210f56-fcc3-4db8-abdb-d43b3ebe695d@palmer-ri-x1c9a/
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