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Message-ID: <Y2uG5jrYeadqMNav@smile.fi.intel.com>
Date:   Wed, 9 Nov 2022 12:54:30 +0200
From:   Andy Shevchenko <andriy.shevchenko@...ux.intel.com>
To:     Linus Walleij <linus.walleij@...aro.org>
Cc:     chengwei <larry.lai@...jingtech.com>, lee@...nel.org, pavel@....cz,
        linux-kernel@...r.kernel.org, linux-gpio@...r.kernel.org,
        linux-leds@...r.kernel.org, GaryWang@...on.com.tw,
        musa.lin@...jingtech.com, jack.chang@...jingtech.com,
        noah.hung@...jingtech.com, Javier Arteaga <javier@...tex.com>,
        Nicola Lunghi <nicola.lunghi@...tex.com>
Subject: Re: [PATCH V3 2/3] pinctrl: Add support pin control for UP board
 CPLD/FPGA

On Wed, Nov 09, 2022 at 10:27:59AM +0100, Linus Walleij wrote:
> On Wed, Nov 9, 2022 at 10:11 AM chengwei <larry.lai@...jingtech.com> wrote:

...

> > +config PINCTRL_UPBOARD
> > +       tristate "UP board FPGA pin controller"
> > +       depends on ACPI
> > +       depends on MFD_UPBOARD_FPGA
> > +       depends on X86
> 
> This is Andy territory as it is x86 and ACPI but...

It seems they forgot paying the respect to the reviewers by Cc'ing them.

...

> So this looks like it should be uncommented and used or deleted?
> It just looks unfinished, and this patch is not an RFC.

I'm wondering why it has v3 and not RFC in the Subject. So, no need to spend
time right now in reviewing this.

-- 
With Best Regards,
Andy Shevchenko


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