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Message-ID: <20221109015818.194927-4-jiucheng.xu@amlogic.com>
Date: Wed, 9 Nov 2022 09:58:18 +0800
From: Jiucheng Xu <jiucheng.xu@...ogic.com>
To: <linux-kernel@...r.kernel.org>,
<linux-arm-kernel@...ts.infradead.org>,
<linux-amlogic@...ts.infradead.org>, <devicetree@...r.kernel.org>
CC: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Will Deacon <will@...nel.org>,
Mark Rutland <mark.rutland@....com>,
Neil Armstrong <neil.armstrong@...aro.org>,
Kevin Hilman <khilman@...libre.com>,
Jerome Brunet <jbrunet@...libre.com>,
Martin Blumenstingl <martin.blumenstingl@...glemail.com>,
Chris Healy <cphealy@...il.com>,
Jianxin Pan <jianxin.pan@...ogic.com>,
Kelvin Zhang <kelvin.zhang@...ogic.com>,
Jiucheng Xu <jiucheng.xu@...ogic.com>
Subject: [PATCH v9 4/4] arm64: dts: meson: Add DDR PMU node
Add DDR PMU device node for G12 series SoC
Signed-off-by: Jiucheng Xu <jiucheng.xu@...ogic.com>
Reviewed-by: Neil Armstrong <neil.armstrong@...aro.org>
---
Changes v8 -> v9:
- No change
Changes v7 -> v8:
- No change
Changes v6 -> v7:
- No change
Changes v5 -> v6:
- No change
Changes v4 -> v5:
- Split reg into two items
- Alphabet order location
Changes v3 -> v4:
- No change
Changes v2 -> v3:
- No change
Changes v1 -> v2:
- Remove model, dmc_nr, chann_nr properties
- Add g12a-ddr-pmu, g12b-ddr-pmu, sm1-ddr-pmu compatibles as
identifier
---
arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi | 6 ++++++
arch/arm64/boot/dts/amlogic/meson-g12a.dtsi | 4 ++++
arch/arm64/boot/dts/amlogic/meson-g12b.dtsi | 4 ++++
arch/arm64/boot/dts/amlogic/meson-sm1.dtsi | 4 ++++
4 files changed, 18 insertions(+)
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
index 45947c1031c4..9dbd50820b1c 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12-common.dtsi
@@ -1705,6 +1705,12 @@ internal_ephy: ethernet_phy@8 {
};
};
+ pmu: pmu@...38000 {
+ reg = <0x0 0xff638000 0x0 0x100>,
+ <0x0 0xff638c00 0x0 0x100>;
+ interrupts = <GIC_SPI 52 IRQ_TYPE_EDGE_RISING>;
+ };
+
aobus: bus@...00000 {
compatible = "simple-bus";
reg = <0x0 0xff800000 0x0 0x100000>;
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
index fb0ab27d1f64..0e8b57283f31 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12a.dtsi
@@ -133,3 +133,7 @@ map1 {
};
};
};
+
+&pmu {
+ compatible = "amlogic,g12a-ddr-pmu";
+};
diff --git a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
index ee8fcae9f9f0..18791ef51f58 100644
--- a/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-g12b.dtsi
@@ -139,3 +139,7 @@ map1 {
&mali {
dma-coherent;
};
+
+&pmu {
+ compatible = "amlogic,g12b-ddr-pmu";
+};
diff --git a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
index 80737731af3f..c307b34ccd72 100644
--- a/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
+++ b/arch/arm64/boot/dts/amlogic/meson-sm1.dtsi
@@ -520,6 +520,10 @@ &pcie {
power-domains = <&pwrc PWRC_SM1_PCIE_ID>;
};
+&pmu {
+ compatible = "amlogic,sm1-ddr-pmu";
+};
+
&pwrc {
compatible = "amlogic,meson-sm1-pwrc";
};
--
2.25.1
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