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Message-ID: <166811409796.976609.332316910295244271.robh@kernel.org>
Date:   Thu, 10 Nov 2022 15:01:40 -0600
From:   Rob Herring <robh@...nel.org>
To:     Serge Semin <Sergey.Semin@...kalelectronics.ru>
Cc:     Gustavo Pimentel <gustavo.pimentel@...opsys.com>,
        Jingoo Han <jingoohan1@...il.com>,
        Manivannan Sadhasivam <manivannan.sadhasivam@...aro.org>,
        Rob Herring <robh+dt@...nel.org>,
        Alexey Malahov <Alexey.Malahov@...kalelectronics.ru>,
        Vinod Koul <vkoul@...nel.org>,
        Bjorn Helgaas <bhelgaas@...gle.com>,
        Krzysztof WilczyƄski <kw@...ux.com>,
        Robin Murphy <robin.murphy@....com>,
        Pavel Parkhomenko <Pavel.Parkhomenko@...kalelectronics.ru>,
        caihuoqing <caihuoqing@...du.com>, linux-kernel@...r.kernel.org,
        Cai Huoqing <cai.huoqing@...ux.dev>,
        Frank Li <Frank.Li@....com>,
        Serge Semin <fancer.lancer@...il.com>,
        devicetree@...r.kernel.org,
        Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        linux-pci@...r.kernel.org
Subject: Re: [PATCH v6 05/20] dt-bindings: PCI: dwc: Add phys/phy-names
 common properties


On Mon, 07 Nov 2022 23:49:19 +0300, Serge Semin wrote:
> It's normal to have the DW PCIe RP/EP DT-nodes equipped with the explicit
> PHY phandle references. There can be up to 16 PHYs attach in accordance
> with the maximum number of supported PCIe lanes. Let's extend the common
> DW PCIe controller schema with the 'phys' and 'phy-names' properties
> definition. There two types PHY names are defined: preferred generic names
> '^pcie[0-9]+$' and non-preferred vendor-specific names
> '^pcie([0-9]+|-?phy[0-9]*)?$' so to match the names currently supported by
> the DW PCIe platform drivers ("pcie": meson; "pciephy": qcom, imx6;
> "pcie-phy": uniphier, rockchip, spear13xx; "pcie": intel-gw; "pcie-phy%d":
> keystone, dra7xx; "pcie": histb, etc).
> 
> Signed-off-by: Serge Semin <Sergey.Semin@...kalelectronics.ru>
> 
> ---
> 
> Changelog v3:
> - This is a new patch unpinned from the next one:
>   https://lore.kernel.org/linux-pci/20220503214638.1895-2-Sergey.Semin@baikalelectronics.ru/
>   by the Rob' request. (@Rob)
> 
> Changelog v5:
> - Add a note about having line-based PHY phandles order. (@Rob)
> - Prefer 'pcie[0-9]+' PHY-names over the rest of the cases. (@Rob)
> 
> Changelog v6:
> - Add the Nvidia Tegra194-specific "p2u-[0-7]" phy-names too. (@DT-tbot)
> - Drop 'deprecated' keywords from the vendor-specific names. (@Rob)
> ---
>  .../bindings/pci/snps,dw-pcie-common.yaml     | 24 +++++++++++++++++++
>  .../bindings/pci/snps,dw-pcie-ep.yaml         |  3 +++
>  .../devicetree/bindings/pci/snps,dw-pcie.yaml |  3 +++
>  3 files changed, 30 insertions(+)
> 

Reviewed-by: Rob Herring <robh@...nel.org>

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