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Message-ID: <CACGkMEtxEe=SdjgE=qm5_TNy-XrY0x9gRZFLNnrA+3JShfLtYw@mail.gmail.com>
Date:   Thu, 10 Nov 2022 14:25:36 +0800
From:   Jason Wang <jasowang@...hat.com>
To:     Xianting Tian <xianting.tian@...ux.alibaba.com>
Cc:     mst@...hat.com, virtualization@...ts.linux-foundation.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH] virtio_pci: use PAGE_SIZE for pci vring align

On Thu, Nov 10, 2022 at 2:14 PM Xianting Tian
<xianting.tian@...ux.alibaba.com> wrote:
>
> As the comments of VIRTIO_PCI_VRING_ALIGN shows, we should use
> PAGE_SZIE not the hard code 4096.
>
> Signed-off-by: Xianting Tian <xianting.tian@...ux.alibaba.com>
> ---
>  include/uapi/linux/virtio_pci.h | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/include/uapi/linux/virtio_pci.h b/include/uapi/linux/virtio_pci.h
> index f703afc7ad31..ed5f678c682b 100644
> --- a/include/uapi/linux/virtio_pci.h
> +++ b/include/uapi/linux/virtio_pci.h
> @@ -90,7 +90,7 @@
>
>  /* The alignment to use between consumer and producer parts of vring.
>   * x86 pagesize again. */

See the comment above, PAGE_SIZE varies among archs.

Thanks

> -#define VIRTIO_PCI_VRING_ALIGN         4096
> +#define VIRTIO_PCI_VRING_ALIGN         PAGE_SIZE
>
>  #endif /* VIRTIO_PCI_NO_LEGACY */
>
> --
> 2.17.1
>

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