linux-kernel - Re: [PATCH v3 9/9] cxl/acpi: Set ACPI's CXL

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Message-ID: <4d0da6a410ca49c1b70628a2a4814bdf2cbfce58.camel@intel.com>
Date:   Thu, 10 Nov 2022 00:51:02 +0000
From:   "Verma, Vishal L" <vishal.l.verma@...el.com>
To:     "helgaas@...nel.org" <helgaas@...nel.org>,
        "rrichter@....com" <rrichter@....com>
CC:     "terry.bowman@....com" <terry.bowman@....com>,
        "Jiang, Dave" <dave.jiang@...el.com>,
        "rafael@...nel.org" <rafael@...nel.org>,
        "Schofield, Alison" <alison.schofield@...el.com>,
        "linux-cxl@...r.kernel.org" <linux-cxl@...r.kernel.org>,
        "lenb@...nel.org" <lenb@...nel.org>,
        "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Williams, Dan J" <dan.j.williams@...el.com>,
        "Weiny, Ira" <ira.weiny@...el.com>,
        "bwidawsk@...nel.org" <bwidawsk@...nel.org>,
        "Jonathan.Cameron@...wei.com" <Jonathan.Cameron@...wei.com>,
        "bhelgaas@...gle.com" <bhelgaas@...gle.com>,
        "dave@...olabs.net" <dave@...olabs.net>,
        "linux-acpi@...r.kernel.org" <linux-acpi@...r.kernel.org>,
        "linux-pci@...r.kernel.org" <linux-pci@...r.kernel.org>
Subject: Re: [PATCH v3 9/9] cxl/acpi: Set ACPI's CXL _OSC to indicate CXL1.1
 support

On Wed, 2022-11-09 at 17:35 -0600, Bjorn Helgaas wrote:
> On Wed, Nov 09, 2022 at 11:40:59AM +0100, Robert Richter wrote:
> > From: Terry Bowman <terry.bowman@....com>
> > 
> > ACPI includes a CXL _OSC support procedure to communicate the available
> > CXL support to FW. The CXL support _OSC includes a field to indicate
> > CXL1.1 RCH RCD support. The OS sets this bit to 1 if it supports access
> > to RCD and RCH Port registers.[1] FW can potentially change it's operation
> 
> s/it's/its/
> 
> > depending on the _OSC support setting reported by the OS.
> > 
> > The ACPI driver does not currently set the ACPI _OSC support to indicate
> > CXL1.1 RCD RCH support. Change the capability reported to include CXL1.1.
> 
> Eight instances of "support" above seems like it might be more than
> necessary.
> 
> I don't know the history, but OSC_CXL_1_1_PORT_REG_ACCESS_SUPPORT and
> OSC_CXL_2_0_PORT_DEV_REG_ACCESS_SUPPORT seem like sort of weird names
> since they don't match the spec at all ("RCD and RCH Port Register
> Access Supported" and "CXL VH Register Access Supported").

Ah the RCH/RCD and VH terminology was only introduced in the CXL-3.0
spec. When the above defines were added, the spec was at 2.0, and it
used the descriptions: "CXL 1.1 Port Register Access supported", and
"CXL 2.0 Port/Device Register Access supported" (Table 217 in 2.0).

> 
> > [1] CXL3.0 Table 9-26 'Interpretation of CXL _OSC Support Field'
> > 
> > Signed-off-by: Terry Bowman <terry.bowman@....com>
> > Signed-off-by: Robert Richter <rrichter@....com>
> > ---
> >  drivers/acpi/pci_root.c | 1 +
> >  1 file changed, 1 insertion(+)
> > 
> > diff --git a/drivers/acpi/pci_root.c b/drivers/acpi/pci_root.c
> > index c8385ef54c37..094a59b216ae 100644
> > --- a/drivers/acpi/pci_root.c
> > +++ b/drivers/acpi/pci_root.c
> > @@ -492,6 +492,7 @@ static u32 calculate_cxl_support(void)
> >         u32 support;
> >  
> >         support = OSC_CXL_2_0_PORT_DEV_REG_ACCESS_SUPPORT;
> > +       support |= OSC_CXL_1_1_PORT_REG_ACCESS_SUPPORT;
> >         if (pci_aer_available())
> >                 support |= OSC_CXL_PROTOCOL_ERR_REPORTING_SUPPORT;
> >         if (IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE))
> > -- 
> > 2.30.2
> >