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Message-ID: <CAPDyKFoycVedCJMy0=UK+q5SiPQHqje_8bSN-gdkpBa6KhFfkg@mail.gmail.com>
Date: Thu, 10 Nov 2022 12:28:41 +0100
From: Ulf Hansson <ulf.hansson@...aro.org>
To: Maxime Ripard <maxime@...no.tech>
Cc: Stephen Boyd <sboyd@...nel.org>,
Maxime Coquelin <mcoquelin.stm32@...il.com>,
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Subject: Re: [PATCH v2 35/65] clk: ux500: sysctrl: Add a determine_rate hook
On Fri, 4 Nov 2022 at 14:32, Maxime Ripard <maxime@...no.tech> wrote:
>
> The UX500 sysctrl "set_parent" clocks implement a mux with a set_parent
> hook, but doesn't provide a determine_rate implementation.
>
> This is a bit odd, since set_parent() is there to, as its name implies,
> change the parent of a clock. However, the most likely candidate to
> trigger that parent change is a call to clk_set_rate(), with
> determine_rate() figuring out which parent is the best suited for a
> given rate.
>
> The other trigger would be a call to clk_set_parent(), but it's far less
> used, and it doesn't look like there's any obvious user for that clock.
If I recall correctly, that is the use case we did target for these
types of clocks. See sound/soc/ux500/ux500_ab85xx.c, for example.
Maybe there are some additional pieces missing from the old down
stream kernel, I don't have full picture, sorry.
Anyway, if I am not wrong, this was about supporting a low-power audio
use case, which requires us to switch the parent clock (to avoid
wasting energy).
>
> So, the set_parent hook is effectively unused, possibly because of an
> oversight. However, it could also be an explicit decision by the
> original author to avoid any reparenting but through an explicit call to
> clk_set_parent().
Yes, this was the reason.
As a matter of fact, I don't even recall that re-parenting was
possible through clk_set_rate() when this clock driver was introduced.
But, I might be wrong, it's quite a while ago.
>
> The latter case would be equivalent to setting the flag
> CLK_SET_RATE_NO_REPARENT, together with setting our determine_rate hook
> to __clk_mux_determine_rate(). Indeed, if no determine_rate
> implementation is provided, clk_round_rate() (through
> clk_core_round_rate_nolock()) will call itself on the parent if
> CLK_SET_RATE_PARENT is set, and will not change the clock rate
> otherwise. __clk_mux_determine_rate() has the exact same behavior when
> CLK_SET_RATE_NO_REPARENT is set.
>
> And if it was an oversight, then we are at least explicit about our
> behavior now and it can be further refined down the line.
>
> Signed-off-by: Maxime Ripard <maxime@...no.tech>
Seems reasonable to me!
Reviewed-by: Ulf Hansson <ulf.hansson@...aro.org>
Kind regards
Uffe
> ---
> drivers/clk/ux500/clk-sysctrl.c | 4 +++-
> 1 file changed, 3 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/clk/ux500/clk-sysctrl.c b/drivers/clk/ux500/clk-sysctrl.c
> index 702f2f8b43fa..d36336665b6d 100644
> --- a/drivers/clk/ux500/clk-sysctrl.c
> +++ b/drivers/clk/ux500/clk-sysctrl.c
> @@ -110,6 +110,7 @@ static const struct clk_ops clk_sysctrl_gate_fixed_rate_ops = {
> };
>
> static const struct clk_ops clk_sysctrl_set_parent_ops = {
> + .determine_rate = __clk_mux_determine_rate,
> .set_parent = clk_sysctrl_set_parent,
> .get_parent = clk_sysctrl_get_parent,
> };
> @@ -220,6 +221,7 @@ struct clk *clk_reg_sysctrl_set_parent(struct device *dev,
> unsigned long flags)
> {
> return clk_reg_sysctrl(dev, name, parent_names, num_parents,
> - reg_sel, reg_mask, reg_bits, 0, 0, flags,
> + reg_sel, reg_mask, reg_bits, 0, 0,
> + flags | CLK_SET_RATE_NO_REPARENT,
> &clk_sysctrl_set_parent_ops);
> }
>
> --
> b4 0.11.0-dev-99e3a
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