linux-kernel - Re: [PATCH 4/9] arm64: dts: qcom: sc8280xp-crd: enable NVMe SSD

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Date:   Fri, 11 Nov 2022 17:22:56 +0100
From:   Johan Hovold <johan@...nel.org>
To:     Konrad Dybcio <konrad.dybcio@...aro.org>
Cc:     Johan Hovold <johan+linaro@...nel.org>,
        Bjorn Andersson <andersson@...nel.org>,
        Andy Gross <agross@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH 4/9] arm64: dts: qcom: sc8280xp-crd: enable NVMe SSD

On Thu, Nov 10, 2022 at 12:06:45PM +0100, Konrad Dybcio wrote:
> On 10/11/2022 11:35, Johan Hovold wrote:
> > Enable the NVMe SSD connected to PCIe2.
> >
> > Signed-off-by: Johan Hovold <johan+linaro@...nel.org>
> > ---
> >   arch/arm64/boot/dts/qcom/sc8280xp-crd.dts | 63 +++++++++++++++++++++++
> >   1 file changed, 63 insertions(+)
> >
> > diff --git a/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts b/arch/arm64/boot/dts/qcom/sc8280xp-crd.dts
> > +	pcie2a_default: pcie2a-default-state {
> 
> Aren't they going to be identical for all boards anyway? Maybe there
> could be some commonization..

We had that discussion and decided that keeping the pinconfig in the dts
is the right thing to do.

And even if the clkreq pin will be the same for all boards that's not
necessarily the case for the other two.

> > +		clkreq-n-pins {
> > +			pins = "gpio142";
> > +			function = "pcie2a_clkreq";
> > +			drive-strength = <2>;
> > +			bias-pull-up;
> > +		};
> > +
> > +		perst-n-pins {
> > +			pins = "gpio143";
> > +			function = "gpio";
> > +			drive-strength = <2>;
> > +			bias-pull-down;
> > +		};
> > +
> > +		wake-n-pins {
> > +		       pins = "gpio145";
> > +		       function = "gpio";
> > +		       drive-strength = <2>;
> > +		       bias-pull-up;
> > +	       };
> > +	};
> > +
> >   	qup0_i2c4_default: qup0-i2c4-default-state {
> >   		pins = "gpio171", "gpio172";
> >   		function = "qup4";

Johan