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Date: Fri, 11 Nov 2022 10:24:50 +0100
From: Johan Hovold <johan+linaro@...nel.org>
To: Vinod Koul <vkoul@...nel.org>
Cc: Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
linux-arm-msm@...r.kernel.org, linux-phy@...ts.infradead.org,
devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
Johan Hovold <johan+linaro@...nel.org>
Subject: [PATCH 07/14] phy: qcom-qmp-combo: drop redundant clock structure
Drop the unnecessary DP clock structure and instead store the clocks
directly in the driver data.
Signed-off-by: Johan Hovold <johan+linaro@...nel.org>
---
drivers/phy/qualcomm/phy-qcom-qmp-combo.c | 52 ++++++++---------------
1 file changed, 17 insertions(+), 35 deletions(-)
diff --git a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
index 01e38dc81a3a..bfe6d1e59ac7 100644
--- a/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
+++ b/drivers/phy/qualcomm/phy-qcom-qmp-combo.c
@@ -861,12 +861,6 @@ struct qmp_phy_cfg {
};
-struct qmp_phy_dp_clks {
- struct qmp_combo *qmp;
- struct clk_hw dp_link_hw;
- struct clk_hw dp_pixel_hw;
-};
-
struct qmp_combo {
struct device *dev;
@@ -902,7 +896,9 @@ struct qmp_combo {
struct phy *dp_phy;
unsigned int dp_aux_cfg;
struct phy_configure_opts_dp dp_opts;
- struct qmp_phy_dp_clks *dp_clks;
+
+ struct clk_hw dp_link_hw;
+ struct clk_hw dp_pixel_hw;
};
static void qmp_v3_dp_aux_init(struct qmp_combo *qmp);
@@ -1398,7 +1394,6 @@ static bool qmp_combo_configure_dp_mode(struct qmp_combo *qmp)
static int qmp_v3_configure_dp_phy(struct qmp_combo *qmp)
{
- const struct qmp_phy_dp_clks *dp_clks = qmp->dp_clks;
const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts;
u32 phy_vco_div, status;
unsigned long pixel_freq;
@@ -1431,8 +1426,8 @@ static int qmp_v3_configure_dp_phy(struct qmp_combo *qmp)
}
writel(phy_vco_div, qmp->dp_pcs + QSERDES_V3_DP_PHY_VCO_DIV);
- clk_set_rate(dp_clks->dp_link_hw.clk, dp_opts->link_rate * 100000);
- clk_set_rate(dp_clks->dp_pixel_hw.clk, pixel_freq);
+ clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000);
+ clk_set_rate(qmp->dp_pixel_hw.clk, pixel_freq);
writel(0x04, qmp->dp_pcs + QSERDES_DP_PHY_AUX_CFG2);
writel(0x01, qmp->dp_pcs + QSERDES_DP_PHY_CFG);
@@ -1529,7 +1524,6 @@ static void qmp_v4_configure_dp_tx(struct qmp_combo *qmp)
static int qmp_v45_configure_dp_phy(struct qmp_combo *qmp)
{
- const struct qmp_phy_dp_clks *dp_clks = qmp->dp_clks;
const struct phy_configure_opts_dp *dp_opts = &qmp->dp_opts;
u32 phy_vco_div, status;
unsigned long pixel_freq;
@@ -1567,8 +1561,8 @@ static int qmp_v45_configure_dp_phy(struct qmp_combo *qmp)
}
writel(phy_vco_div, qmp->dp_pcs + QSERDES_V4_DP_PHY_VCO_DIV);
- clk_set_rate(dp_clks->dp_link_hw.clk, dp_opts->link_rate * 100000);
- clk_set_rate(dp_clks->dp_pixel_hw.clk, pixel_freq);
+ clk_set_rate(qmp->dp_link_hw.clk, dp_opts->link_rate * 100000);
+ clk_set_rate(qmp->dp_pixel_hw.clk, pixel_freq);
writel(0x01, qmp->dp_pcs + QSERDES_DP_PHY_CFG);
writel(0x05, qmp->dp_pcs + QSERDES_DP_PHY_CFG);
@@ -2354,12 +2348,10 @@ static int qcom_qmp_dp_pixel_clk_determine_rate(struct clk_hw *hw,
static unsigned long
qcom_qmp_dp_pixel_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
{
- const struct qmp_phy_dp_clks *dp_clks;
const struct qmp_combo *qmp;
const struct phy_configure_opts_dp *dp_opts;
- dp_clks = container_of(hw, struct qmp_phy_dp_clks, dp_pixel_hw);
- qmp = dp_clks->qmp;
+ qmp = container_of(hw, struct qmp_combo, dp_pixel_hw);
dp_opts = &qmp->dp_opts;
switch (dp_opts->link_rate) {
@@ -2398,12 +2390,10 @@ static int qcom_qmp_dp_link_clk_determine_rate(struct clk_hw *hw,
static unsigned long
qcom_qmp_dp_link_clk_recalc_rate(struct clk_hw *hw, unsigned long parent_rate)
{
- const struct qmp_phy_dp_clks *dp_clks;
const struct qmp_combo *qmp;
const struct phy_configure_opts_dp *dp_opts;
- dp_clks = container_of(hw, struct qmp_phy_dp_clks, dp_link_hw);
- qmp = dp_clks->qmp;
+ qmp = container_of(hw, struct qmp_combo, dp_link_hw);
dp_opts = &qmp->dp_opts;
switch (dp_opts->link_rate) {
@@ -2425,7 +2415,7 @@ static const struct clk_ops qcom_qmp_dp_link_clk_ops = {
static struct clk_hw *
qcom_qmp_dp_clks_hw_get(struct of_phandle_args *clkspec, void *data)
{
- struct qmp_phy_dp_clks *dp_clks = data;
+ struct qmp_combo *qmp = data;
unsigned int idx = clkspec->args[0];
if (idx >= 2) {
@@ -2434,42 +2424,34 @@ qcom_qmp_dp_clks_hw_get(struct of_phandle_args *clkspec, void *data)
}
if (idx == 0)
- return &dp_clks->dp_link_hw;
+ return &qmp->dp_link_hw;
- return &dp_clks->dp_pixel_hw;
+ return &qmp->dp_pixel_hw;
}
static int phy_dp_clks_register(struct qmp_combo *qmp, struct device_node *np)
{
struct clk_init_data init = { };
- struct qmp_phy_dp_clks *dp_clks;
char name[64];
int ret;
- dp_clks = devm_kzalloc(qmp->dev, sizeof(*dp_clks), GFP_KERNEL);
- if (!dp_clks)
- return -ENOMEM;
-
- dp_clks->qmp = qmp;
- qmp->dp_clks = dp_clks;
-
snprintf(name, sizeof(name), "%s::link_clk", dev_name(qmp->dev));
init.ops = &qcom_qmp_dp_link_clk_ops;
init.name = name;
- dp_clks->dp_link_hw.init = &init;
- ret = devm_clk_hw_register(qmp->dev, &dp_clks->dp_link_hw);
+ qmp->dp_link_hw.init = &init;
+ ret = devm_clk_hw_register(qmp->dev, &qmp->dp_link_hw);
if (ret)
return ret;
snprintf(name, sizeof(name), "%s::vco_div_clk", dev_name(qmp->dev));
init.ops = &qcom_qmp_dp_pixel_clk_ops;
init.name = name;
- dp_clks->dp_pixel_hw.init = &init;
- ret = devm_clk_hw_register(qmp->dev, &dp_clks->dp_pixel_hw);
+ qmp->dp_pixel_hw.init = &init;
+ ret = devm_clk_hw_register(qmp->dev, &qmp->dp_pixel_hw);
if (ret)
return ret;
- ret = of_clk_add_hw_provider(np, qcom_qmp_dp_clks_hw_get, dp_clks);
+ ret = of_clk_add_hw_provider(np, qcom_qmp_dp_clks_hw_get, qmp);
if (ret)
return ret;
--
2.37.4
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