linux-kernel - Re: [PATCH v5 2/2] arm64: support batched/deferred tlb shootdown during page reclamation

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Message-ID: <9982dac0-9f2e-112a-d440-467c8e8f8aa4@huawei.com>
Date:   Mon, 14 Nov 2022 16:46:10 +0800
From:   Yicong Yang <yangyicong@...wei.com>
To:     Anshuman Khandual <anshuman.khandual@....com>,
        <akpm@...ux-foundation.org>, <linux-mm@...ck.org>,
        <linux-arm-kernel@...ts.infradead.org>, <x86@...nel.org>,
        <catalin.marinas@....com>, <will@...nel.org>,
        <linux-doc@...r.kernel.org>
CC:     <yangyicong@...ilicon.com>, <corbet@....net>,
        <peterz@...radead.org>, <arnd@...db.de>,
        <punit.agrawal@...edance.com>, <linux-kernel@...r.kernel.org>,
        <darren@...amperecomputing.com>, <huzhanyuan@...o.com>,
        <lipeifeng@...o.com>, <zhangshiming@...o.com>, <guojian@...o.com>,
        <realmz6@...il.com>, <linux-mips@...r.kernel.org>,
        <openrisc@...ts.librecores.org>, <linuxppc-dev@...ts.ozlabs.org>,
        <linux-riscv@...ts.infradead.org>, <linux-s390@...r.kernel.org>,
        Barry Song <21cnbao@...il.com>, <wangkefeng.wang@...wei.com>,
        <xhao@...ux.alibaba.com>, <prime.zeng@...ilicon.com>,
        Barry Song <v-songbaohua@...o.com>,
        Nadav Amit <namit@...are.com>, Mel Gorman <mgorman@...e.de>
Subject: Re: [PATCH v5 2/2] arm64: support batched/deferred tlb shootdown
 during page reclamation

On 2022/11/14 11:29, Anshuman Khandual wrote:
> 
> 
> On 10/28/22 13:42, Yicong Yang wrote:
>> +static inline bool arch_tlbbatch_should_defer(struct mm_struct *mm)
>> +{
>> +	/*
>> +	 * TLB batched flush is proved to be beneficial for systems with large
>> +	 * number of CPUs, especially system with more than 8 CPUs. TLB shutdown
>> +	 * is cheap on small systems which may not need this feature. So use
>> +	 * a threshold for enabling this to avoid potential side effects on
>> +	 * these platforms.
>> +	 */
>> +	if (num_online_cpus() <= CONFIG_ARM64_NR_CPUS_FOR_BATCHED_TLB)
>> +		return false;
>> +
>> +#ifdef CONFIG_ARM64_WORKAROUND_REPEAT_TLBI
>> +	if (unlikely(this_cpu_has_cap(ARM64_WORKAROUND_REPEAT_TLBI)))
>> +		return false;
>> +#endif
> 
> should_defer_flush() is immediately followed by set_tlb_ubc_flush_pending() which calls
> arch_tlbbatch_add_mm(), triggering the actual TLBI flush via __flush_tlb_page_nosync().
> It should be okay to check capability with this_cpu_has_cap() as the entire call chain
> here is executed on the same cpu. But just wondering if cpus_have_const_cap() would be
> simpler, consistent, and also cost effective ?
> 

ok. Checked cpus_have_const_cap() I think it matches your words.

> Regardless, a comment is needed before the #ifdef block explaining why it does not make
> sense to defer/batch when __tlbi()/__tlbi_user() implementation will execute 'dsb(ish)'
> between two TLBI instructions to workaround the errata.
> 

The workaround for the errata mentioned the affected platforms need the tlbi+dsb to be done
twice, so I'm not sure if we defer the final dsb will cause any problem so I think the judgement
here is used for safety. I have no such platform to test if it's ok to defer the last dsb.

>> +
>> +	return true;
>> +}
>> +
>> +static inline void arch_tlbbatch_add_mm(struct arch_tlbflush_unmap_batch *batch,
>> +					struct mm_struct *mm,
>> +					unsigned long uaddr)
>> +{
>> +	__flush_tlb_page_nosync(mm, uaddr);
>> +}
>> +
>> +static inline void arch_tlbbatch_flush(struct arch_tlbflush_unmap_batch *batch)
>> +{
>> +	dsb(ish);
>> +}
> .
>