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Message-Id: <20221114090315.848208-9-miquel.raynal@bootlin.com>
Date: Mon, 14 Nov 2022 10:03:06 +0100
From: Miquel Raynal <miquel.raynal@...tlin.com>
To: Rob Herring <robh+dt@...nel.org>,
Krzysztof Kozlowski <krzk+dt@...nel.org>,
devicetree@...r.kernel.org
Cc: Richard Weinberger <richard@....at>,
Vignesh Raghavendra <vigneshr@...com>,
Tudor Ambarus <Tudor.Ambarus@...rochip.com>,
Pratyush Yadav <pratyush@...nel.org>,
Michael Walle <michael@...le.cc>,
<linux-mtd@...ts.infradead.org>,
Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
<linux-kernel@...r.kernel.org>,
Miquel Raynal <miquel.raynal@...tlin.com>,
Rob Herring <robh@...nel.org>
Subject: [PATCH v3 08/17] dt-bindings: mtd: sunxi-nand: Add an example to validate the bindings
Copy-paste an existing DT node to ensure the dt_binding_check target
would catch any unforeseen difference.
Signed-off-by: Miquel Raynal <miquel.raynal@...tlin.com>
Reviewed-by: Rob Herring <robh@...nel.org>
---
.../mtd/allwinner,sun4i-a10-nand.yaml | 23 +++++++++++++++++++
1 file changed, 23 insertions(+)
diff --git a/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml b/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml
index 465aa69f0f10..e7ec0c59bca6 100644
--- a/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml
+++ b/Documentation/devicetree/bindings/mtd/allwinner,sun4i-a10-nand.yaml
@@ -86,4 +86,27 @@ required:
unevaluatedProperties: false
+examples:
+ - |
+ #include <dt-bindings/interrupt-controller/arm-gic.h>
+ #include <dt-bindings/clock/sun6i-rtc.h>
+ #include <dt-bindings/clock/sun8i-a23-a33-ccu.h>
+ #include <dt-bindings/reset/sun8i-a23-a33-ccu.h>
+
+ nand-controller@...3000 {
+ compatible = "allwinner,sun8i-a23-nand-controller";
+ reg = <0x01c03000 0x1000>;
+ interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
+ clocks = <&ccu CLK_BUS_NAND>, <&ccu CLK_NAND>;
+ clock-names = "ahb", "mod";
+ resets = <&ccu RST_BUS_NAND>;
+ reset-names = "ahb";
+ dmas = <&dma 5>;
+ dma-names = "rxtx";
+ pinctrl-names = "default";
+ pinctrl-0 = <&nand_pins &nand_cs0_pin &nand_rb0_pin>;
+ #address-cells = <1>;
+ #size-cells = <0>;
+ };
+
...
--
2.34.1
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