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Message-Id: <20221114104222.36329-2-konrad.dybcio@linaro.org>
Date:   Mon, 14 Nov 2022 11:42:14 +0100
From:   Konrad Dybcio <konrad.dybcio@...aro.org>
To:     linux-arm-msm@...r.kernel.org, andersson@...nel.org,
        agross@...nel.org, krzysztof.kozlowski@...aro.org
Cc:     patches@...aro.org, Konrad Dybcio <konrad.dybcio@...aro.org>,
        Will Deacon <will@...nel.org>,
        Robin Murphy <robin.murphy@....com>,
        Joerg Roedel <joro@...tes.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        linux-arm-kernel@...ts.infradead.org, iommu@...ts.linux.dev,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: [PATCH v2 1/9] dt-bindings: arm-smmu: Allow up to 3 power-domains

Some SMMUs require that a vote is held on as much as 3 separate PDs
(hello Qualcomm). Allow it in bindings.

Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>
---
Changes since v1:
- Add minItems

 Documentation/devicetree/bindings/iommu/arm,smmu.yaml | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
index 9066e6df1ba1..82bc696de662 100644
--- a/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
+++ b/Documentation/devicetree/bindings/iommu/arm,smmu.yaml
@@ -159,7 +159,8 @@ properties:
           through the TCU's programming interface.
 
   power-domains:
-    maxItems: 1
+    minItems: 0
+    maxItems: 3
 
   nvidia,memory-controller:
     description: |
-- 
2.38.1

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