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Date:   Tue, 15 Nov 2022 11:13:42 -0600
From:   Bjorn Andersson <andersson@...nel.org>
To:     Shazad Hussain <quic_shazhuss@...cinc.com>, sboyd@...nel.org
Cc:     johan@...nel.org, bmasney@...hat.com, agross@...nel.org,
        mturquette@...libre.com, ahalaney@...hat.com,
        Johan Hovold <johan+linaro@...nel.org>,
        Konrad Dybcio <konrad.dybcio@...aro.org>,
        Vinod Koul <vkoul@...nel.org>, linux-arm-msm@...r.kernel.org,
        linux-clk@...r.kernel.org, linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3] clk: qcom: gcc-sc8280xp: add cxo as parent for three
 ufs ref clks

On Tue, Nov 15, 2022 at 08:59:56PM +0530, Shazad Hussain wrote:
> The three UFS reference clocks, gcc_ufs_ref_clkref_clk for external
> UFS devices, gcc_ufs_card_clkref_clk and gcc_ufs_1_card_clkref_clk for
> two PHYs are all sourced from CXO.
> 
> Added parent_data for all three reference clocks described above to
> reflect that all three clocks are sourced from CXO to have valid
> frequency for the ref clock needed by UFS controller driver.
> 
> Fixes: d65d005f9a6c ("clk: qcom: add sc8280xp GCC driver")
> Link: https://lore.kernel.org/lkml/Y2Tber39cHuOSR%2FW@hovoldconsulting.com/
> Signed-off-by: Shazad Hussain <quic_shazhuss@...cinc.com>
> Tested-by: Johan Hovold <johan+linaro@...nel.org>
> Reviewed-by: Johan Hovold <johan+linaro@...nel.org>
> Tested-by: Andrew Halaney <ahalaney@...hat.com>
> Reviewed-by: Andrew Halaney <ahalaney@...hat.com>
> Reviewed-by: Reviewed-by: Brian Masney <bmasney@...hat.com>

Really-really-reviewed-by? ;)


Reviewed-by: Bjorn Andersson <andersson@...nel.org>


@Stephen, could you please pick this for clk-fixes?

Thanks,
Bjorn

> ---
> Changes since v2:
> -  Tweaked commit message and added R-b T-b from v2
> 
> v2 of this patch can be found at
> https://lore.kernel.org/all/20221115102217.6381-1-quic_shazhuss@quicinc.com/
> 
> v1 of this patch can be found at
> https://lore.kernel.org/all/20221030142333.31019-1-quic_shazhuss@quicinc.com/
> 
> used below patches for verification on next-20221114
> https://lore.kernel.org/lkml/20221104092045.17410-2-johan+linaro@kernel.org/
> https://lore.kernel.org/lkml/20221104092045.17410-3-johan+linaro@kernel.org/
> https://lore.kernel.org/lkml/20221111113732.461881-1-thierry.reding@gmail.com/
> 
>  drivers/clk/qcom/gcc-sc8280xp.c | 6 ++++++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/clk/qcom/gcc-sc8280xp.c b/drivers/clk/qcom/gcc-sc8280xp.c
> index a18ed88f3b82..b3198784e1c3 100644
> --- a/drivers/clk/qcom/gcc-sc8280xp.c
> +++ b/drivers/clk/qcom/gcc-sc8280xp.c
> @@ -5364,6 +5364,8 @@ static struct clk_branch gcc_ufs_1_card_clkref_clk = {
>  		.enable_mask = BIT(0),
>  		.hw.init = &(const struct clk_init_data) {
>  			.name = "gcc_ufs_1_card_clkref_clk",
> +			.parent_data = &gcc_parent_data_tcxo,
> +			.num_parents = 1,
>  			.ops = &clk_branch2_ops,
>  		},
>  	},
> @@ -5432,6 +5434,8 @@ static struct clk_branch gcc_ufs_card_clkref_clk = {
>  		.enable_mask = BIT(0),
>  		.hw.init = &(const struct clk_init_data) {
>  			.name = "gcc_ufs_card_clkref_clk",
> +			.parent_data = &gcc_parent_data_tcxo,
> +			.num_parents = 1,
>  			.ops = &clk_branch2_ops,
>  		},
>  	},
> @@ -5848,6 +5852,8 @@ static struct clk_branch gcc_ufs_ref_clkref_clk = {
>  		.enable_mask = BIT(0),
>  		.hw.init = &(const struct clk_init_data) {
>  			.name = "gcc_ufs_ref_clkref_clk",
> +			.parent_data = &gcc_parent_data_tcxo,
> +			.num_parents = 1,
>  			.ops = &clk_branch2_ops,
>  		},
>  	},
> -- 
> 2.38.0
> 

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