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Message-ID: <Y3ORTv/1YbTFJQzq@rric.localdomain>
Date: Tue, 15 Nov 2022 14:17:02 +0100
From: Robert Richter <rrichter@....com>
To: Dan Williams <dan.j.williams@...el.com>
CC: Alison Schofield <alison.schofield@...el.com>,
Vishal Verma <vishal.l.verma@...el.com>,
Ira Weiny <ira.weiny@...el.com>,
Ben Widawsky <bwidawsk@...nel.org>,
<linux-cxl@...r.kernel.org>, <linux-kernel@...r.kernel.org>,
Bjorn Helgaas <bhelgaas@...gle.com>,
"Rafael J. Wysocki" <rafael@...nel.org>,
Len Brown <lenb@...nel.org>,
Jonathan Cameron <Jonathan.Cameron@...wei.com>,
Davidlohr Bueso <dave@...olabs.net>,
Dave Jiang <dave.jiang@...el.com>
Subject: Re: [PATCH v3 4/9] cxl/mem: Skip intermediate port enumeration of
restricted endpoints (RCDs)
On 14.11.22 16:07:58, Dan Williams wrote:
> Robert Richter wrote:
> > When an endpoint is found, all ports in beetween the endpoint and the
> > CXL host bridge need to be created. In the RCH case there are no ports
> > in between a host bridge and the endpoint. Skip the enumeration of
> > intermediate ports.
> >
> > The port enumeration does not only create all ports, it also
> > initializes the endpoint chain by adding the endpoint to every
> > downstream port up to the root bridge. This must be done also in RCD
> > mode, but is much more simple as the endpoint only needs to be added
> > to the host bridge's dport.
> >
> > Note: For endpoint removal the cxl_detach_ep() is not needed as it is
> > released in cxl_port_release().
> >
> > Signed-off-by: Robert Richter <rrichter@....com>
> > ---
> > drivers/cxl/core/port.c | 18 ++++++++++++++++--
> > 1 file changed, 16 insertions(+), 2 deletions(-)
> >
> > diff --git a/drivers/cxl/core/port.c b/drivers/cxl/core/port.c
> > index d10c3580719b..e21a9c3fe4da 100644
> > --- a/drivers/cxl/core/port.c
> > +++ b/drivers/cxl/core/port.c
> > @@ -1366,8 +1366,24 @@ int devm_cxl_enumerate_ports(struct cxl_memdev *cxlmd)
> > {
> > struct device *dev = &cxlmd->dev;
> > struct device *iter;
> > + struct cxl_dport *dport;
> > + struct cxl_port *port;
> > int rc;
> >
> > + /*
> > + * Skip intermediate port enumeration in the RCH case, there
> > + * are no ports in between a host bridge and an endpoint. Only
> > + * initialize the EP chain.
> > + */
> > + if (is_cxl_restricted(cxlmd)) {
>
> I changed this to:
>
> if (cxlmd->cxlds->rcd) {
I a mail to Bjorn I suggested to have cxl_dev_cap and a cxl_port_cap
in the pci_dev struct that could be looked up too including RCD mode.
Checking the pci_dev looks more reasonable to me here, though we could
have a flag of it in cxlds too.
-Robert
>
> ...where the cxl_pci driver sets that rcd flag. Aside from keeping some
> PCI specifics out of this helper it also allows RCH/RCD configurations
> to be mocked with cxl_test.
>
> > + port = cxl_mem_find_port(cxlmd, &dport);
> > + if (!port)
> > + return -ENXIO;
> > + rc = cxl_add_ep(dport, &cxlmd->dev);
>
> Ah, good catch, I had missed this detail previously.
>
> > + put_device(&port->dev);
> > + return rc;
> > + }
> > +
> > rc = devm_add_action_or_reset(&cxlmd->dev, cxl_detach_ep, cxlmd);
> > if (rc)
> > return rc;
> > @@ -1381,8 +1397,6 @@ int devm_cxl_enumerate_ports(struct cxl_memdev *cxlmd)
> > for (iter = dev; iter; iter = grandparent(iter)) {
> > struct device *dport_dev = grandparent(iter);
> > struct device *uport_dev;
> > - struct cxl_dport *dport;
> > - struct cxl_port *port;
> >
> > if (!dport_dev)
> > return 0;
> > --
> > 2.30.2
> >
>
>
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