linux-kernel - Re: [PATCH v2 6/7] ARM: dts: r9a06g032: Add the USBF controller node

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Message-ID: <CAMuHMdUHEc6XYcdrcZ=H_wjBy4vFBTRjUDE2rRmGd+Jyg7BzDQ@mail.gmail.com>
Date:   Tue, 15 Nov 2022 15:11:06 +0100
From:   Geert Uytterhoeven <geert@...ux-m68k.org>
To:     Krzysztof Kozlowski <krzysztof.kozlowski@...aro.org>
Cc:     Herve Codina <herve.codina@...tlin.com>,
        Geert Uytterhoeven <geert+renesas@...der.be>,
        Michael Turquette <mturquette@...libre.com>,
        Stephen Boyd <sboyd@...nel.org>,
        Rob Herring <robh+dt@...nel.org>,
        Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
        Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
        Magnus Damm <magnus.damm@...il.com>,
        Gareth Williams <gareth.williams.jx@...esas.com>,
        linux-renesas-soc@...r.kernel.org, linux-clk@...r.kernel.org,
        devicetree@...r.kernel.org, linux-kernel@...r.kernel.org,
        linux-usb@...r.kernel.org,
        Thomas Petazzoni <thomas.petazzoni@...tlin.com>,
        Miquel Raynal <miquel.raynal@...tlin.com>
Subject: Re: [PATCH v2 6/7] ARM: dts: r9a06g032: Add the USBF controller node

Hi Krzysztof,

On Tue, Nov 15, 2022 at 2:16 PM Krzysztof Kozlowski
<krzysztof.kozlowski@...aro.org> wrote:
> On 14/11/2022 12:15, Herve Codina wrote:
> > Add the USBF controller available in the r9a06g032 SoC.
> >
> > Signed-off-by: Herve Codina <herve.codina@...tlin.com>
> > ---
> >  arch/arm/boot/dts/r9a06g032.dtsi | 12 ++++++++++++
> >  1 file changed, 12 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/r9a06g032.dtsi b/arch/arm/boot/dts/r9a06g032.dtsi
> > index 563024c9a4ae..a4bb069457a3 100644
> > --- a/arch/arm/boot/dts/r9a06g032.dtsi
> > +++ b/arch/arm/boot/dts/r9a06g032.dtsi
> > @@ -117,6 +117,18 @@ dmamux: dma-router@a0 {
> >                       };
> >               };
> >
> > +             udc: usb@...1e000 {
> > +                     compatible = "renesas,r9a06g032-usbf", "renesas,rzn1-usbf";
> > +                     reg = <0x4001e000 0x2000>;
> > +                     interrupts = <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>,
> > +                                  <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>;
> > +                     clocks = <&sysctrl R9A06G032_HCLK_USBF>,
> > +                              <&sysctrl R9A06G032_HCLK_USBPM>;
> > +                     clock-names = "hclkf", "hclkpm";
> > +                     power-domains = <&sysctrl>;
> > +                     status = "disabled";
>
> If you provided all resources (clocks, power domains etc), why disabling it?

Doesn't this depend on wiring on the board, and providing pin control
in the board DTS?

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@...ux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds