linux-kernel - Re: [PATCH v3 1/7] x86: KVM: Move existing x86 CPUID leaf [CPUID_7_1

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Message-ID: <Y3OwaRBzVFqJ4KEs@google.com>
Date:   Tue, 15 Nov 2022 15:29:45 +0000
From:   Sean Christopherson <seanjc@...gle.com>
To:     Xiaoyao Li <xiaoyao.li@...el.com>
Cc:     Jiaxi Chen <jiaxi.chen@...ux.intel.com>, kvm@...r.kernel.org,
        tglx@...utronix.de, mingo@...hat.com, bp@...en8.de,
        dave.hansen@...ux.intel.com, x86@...nel.org, hpa@...or.com,
        pbonzini@...hat.com, ndesaulniers@...gle.com,
        alexandre.belloni@...tlin.com, peterz@...radead.org,
        jpoimboe@...nel.org, chang.seok.bae@...el.com,
        pawan.kumar.gupta@...ux.intel.com, babu.moger@....com,
        jmattson@...gle.com, sandipan.das@....com, tony.luck@...el.com,
        sathyanarayanan.kuppuswamy@...ux.intel.com, fenghua.yu@...el.com,
        keescook@...omium.org, nathan@...nel.org,
        linux-kernel@...r.kernel.org
Subject: Re: [PATCH v3 1/7] x86: KVM: Move existing x86 CPUID leaf
 [CPUID_7_1_EAX] to kvm-only leaf

On Tue, Nov 15, 2022, Xiaoyao Li wrote:
> On 11/10/2022 9:52 AM, Jiaxi Chen wrote:
> > cpuid_leaf[12] CPUID_7_1_EAX has only two bits are in use currently:
> > 
> >   - AVX-VNNI CPUID.(EAX=7,ECX=1):EAX[bit 4]
> >   - AVX512-BF16 CPUID.(EAX=7,ECX=1):EAX[bit 5]
> > 
> > These two bits have no other kernel usages other than the guest
> > CPUID advertisement in KVM. Given that and to save space for kernel
> > feature bits, move these two bits to the kvm-only subleaves. The
> > existing leaf cpuid_leafs[12] is set to CPUID_LNX_5 so future feature
> > can pick it. This basically reverts:
> > 
> >   - commit b85a0425d805 ("Enumerate AVX Vector Neural Network
> > instructions")
> >   - commit b302e4b176d0 ("x86/cpufeatures: Enumerate the new AVX512
> > BFLOAT16 instructions")
> >   - commit 1085a6b585d7 ("KVM: Expose AVX_VNNI instruction to guset")
> 
> FYI, LAM support has been queued in tip https://git.kernel.org/pub/scm/linux/kernel/git/tip/tip.git/commit/?id=aa387b1b1e666cacffc0b7ac7e0949a68013b2d9
> 
> It adds
> 
> +#define X86_FEATURE_LAM			(12*32+26) /* Linear Address Masking */
> 
> and conflict with this patch.
> 
> Seen from the ISE, there are more bits defined in CPUID_7_1_EAX. And I
> believe Intel will define more and it's likely some of them will be used by
> kernel just like LAM.

Heh, are any of the bits you believe Intel will add publicly documented?  :-)

LAM could be scattered, but if more bits are expected that's probably a waste of
time and effort.

Thanks for the heads up!