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Message-ID: <Y3U5xwujkZvI0TEN@nvidia.com>
Date: Wed, 16 Nov 2022 15:28:07 -0400
From: Jason Gunthorpe <jgg@...dia.com>
To: Thomas Gleixner <tglx@...utronix.de>
Cc: LKML <linux-kernel@...r.kernel.org>, x86@...nel.org,
Joerg Roedel <joro@...tes.org>, Will Deacon <will@...nel.org>,
linux-pci@...r.kernel.org, Bjorn Helgaas <bhelgaas@...gle.com>,
Lorenzo Pieralisi <lorenzo.pieralisi@....com>,
Marc Zyngier <maz@...nel.org>,
Greg Kroah-Hartman <gregkh@...uxfoundation.org>,
Dave Jiang <dave.jiang@...el.com>,
Alex Williamson <alex.williamson@...hat.com>,
Kevin Tian <kevin.tian@...el.com>,
Dan Williams <dan.j.williams@...el.com>,
Logan Gunthorpe <logang@...tatee.com>,
Ashok Raj <ashok.raj@...el.com>, Jon Mason <jdmason@...zu.us>,
Allen Hubbe <allenbh@...il.com>,
"Ahmed S. Darwish" <darwi@...utronix.de>,
Reinette Chatre <reinette.chatre@...el.com>
Subject: Re: [patch 19/33] genirq/msi: Provide msi_desc::msi_data
On Fri, Nov 11, 2022 at 02:58:41PM +0100, Thomas Gleixner wrote:
> +/**
> + * struct msi_desc_data - Generic MSI descriptor data
> + * @iobase: Pointer to the IOMEM base adress for interrupt callbacks
> + * @cookie: Device cookie provided at allocation time
> + *
> + * The content of this data is implementation defined, e.g. PCI/IMS
> + * implementations will define the meaning of the data.
> + */
> +struct msi_desc_data {
> + void __iomem *iobase;
> + union msi_dev_cookie cookie;
> +};
It would be nice to see the pci_msi_desc converted to a domain
specific storage as well.
Maybe could be written
struct msi_desc {
u64 domain_data[2];
}
struct pci_msi_desc {
u32 msi_mask;
u8 multiple : 3;
u8 multi_cap : 3;
u8 can_mask : 1;
u8 is_64 : 1;
u8 mask_pos;
u16 default_irq;
}
static_assert(sizeof(struct pci_msi_desc) <= sizeof(((struct msi_desc *)0)->domain_data));
struct pci_msix_desc {
u32 msix_ctrl;
u8 multiple : 3;
u8 multi_cap : 3;
u8 can_mask : 1;
u8 is_64 : 1;
u16 default_irq;
void __iomem *mask_base;
}
static_assert(sizeof(struct pci_msix_desc) <= sizeof(((struct msi_desc *)0)->domain_data));
ideally hidden in the pci code with some irq_chip facing export API to
snoop in the bits a few places need
We've used 128 bits for the PCI descriptor, we might as well like
everyone have all 128 bits for whatever they want to do
Jason
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