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Message-ID: <20221116215902.GA1038313-robh@kernel.org>
Date: Wed, 16 Nov 2022 15:59:02 -0600
From: Rob Herring <robh@...nel.org>
To: Johan Hovold <johan+linaro@...nel.org>
Cc: Vinod Koul <vkoul@...nel.org>, Andy Gross <agross@...nel.org>,
Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...aro.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Dmitry Baryshkov <dmitry.baryshkov@...aro.org>,
linux-arm-msm@...r.kernel.org, devicetree@...r.kernel.org,
linux-kernel@...r.kernel.org
Subject: Re: [PATCH v2 02/15] dt-bindings: phy: qcom,qmp-usb3-dp: fix
sc8280xp binding
On Tue, Nov 15, 2022 at 03:39:52PM +0100, Johan Hovold wrote:
> The current QMP USB3-DP PHY bindings are based on the original MSM8996
> binding which provided multiple PHYs per IP block and these in turn were
> described by child nodes.
>
> The QMP USB3-DP PHY block provides a single multi-protocol PHY and even
> if some resources are only used by either the USB or DP part of the
> device there is no real benefit in describing these resources in child
> nodes.
>
> The original MSM8996 binding also ended up describing the individual
> register blocks as belonging to either the wrapper node or the PHY child
> nodes.
>
> This is an unnecessary level of detail which has lead to problems when
> later IP blocks using different register layouts have been forced to fit
> the original mould rather than updating the binding. The bindings are
> arguable also incomplete as they only the describe register blocks used
> by the current Linux drivers (e.g. does not include the PCS LANE
> registers).
>
> This is specifically true for later USB4-USB3-DP QMP PHYs where the TX
> registers are used by both the USB3 and DP parts of the PHY (and where
> the USB4 part of the PHY was not covered by the binding at all). Notably
> there are also no DP "RX" (sic) registers as described by the current
> bindings and the DP "PCS" region is really a set of DP_PHY registers.
>
> Add a new binding for the USB4-USB3-DP QMP PHYs found on SC8280XP which
> further bindings can be based on.
>
> Note that the binding uses a PHY index to access either the USB3 or DP
> part of the PHY and that this can later be used also for the USB4 part
> if needed.
>
> Similarly, the clock inputs and outputs can later be extended to support
> USB4.
>
> Also note that the current binding is simply removed instead of being
> deprecated as it was only recently merged and would not allow for
> supporting DP mode.
>
> Signed-off-by: Johan Hovold <johan+linaro@...nel.org>
> ---
> .../phy/qcom,sc7180-qmp-usb3-dp-phy.yaml | 12 ---
> .../phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml | 99 +++++++++++++++++++
> include/dt-bindings/phy/phy-qcom-qmp.h | 20 ++++
> 3 files changed, 119 insertions(+), 12 deletions(-)
> create mode 100644 Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
> create mode 100644 include/dt-bindings/phy/phy-qcom-qmp.h
>
> diff --git a/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml
> index 8afc5e815ae8..d9d0ab90edb1 100644
> --- a/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml
> +++ b/Documentation/devicetree/bindings/phy/qcom,sc7180-qmp-usb3-dp-phy.yaml
> @@ -23,7 +23,6 @@ properties:
> - qcom,sc7180-qmp-usb3-dp-phy
> - qcom,sc7280-qmp-usb3-dp-phy
> - qcom,sc8180x-qmp-usb3-dp-phy
> - - qcom,sc8280xp-qmp-usb43dp-phy
> - qcom,sdm845-qmp-usb3-dp-phy
> - qcom,sm8250-qmp-usb3-dp-phy
> reg:
> @@ -169,17 +168,6 @@ required:
>
> additionalProperties: false
>
> -allOf:
> - - if:
> - properties:
> - compatible:
> - contains:
> - enum:
> - - qcom,sc8280xp-qmp-usb43dp-phy
> - then:
> - required:
> - - power-domains
> -
> examples:
> - |
> #include <dt-bindings/clock/qcom,gcc-sdm845.h>
> diff --git a/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
> new file mode 100644
> index 000000000000..6f31693d9868
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml
> @@ -0,0 +1,99 @@
> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/phy/qcom,sc8280xp-qmp-usb43dp-phy.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: Qualcomm QMP USB4-USB3-DP PHY controller (SC8280XP)
> +
> +maintainers:
> + - Vinod Koul <vkoul@...nel.org>
> +
> +description:
> + The QMP PHY controller supports physical layer functionality for a number of
> + controllers on Qualcomm chipsets, such as, PCIe, UFS and USB.
> +
> +properties:
> + compatible:
> + enum:
> + - qcom,sc8280xp-qmp-usb43dp-phy
> +
> + reg:
> + maxItems: 1
> +
> + clocks:
> + maxItems: 4
> +
> + clock-names:
> + items:
> + - const: aux
> + - const: ref
> + - const: com_aux
> + - const: usb3_pipe
> +
> + power-domains:
> + maxItems: 1
> +
> + resets:
> + maxItems: 2
> +
> + reset-names:
> + items:
> + - const: phy
> + - const: common
> +
> + vdda-phy-supply: true
> +
> + vdda-pll-supply: true
> +
> + "#clock-cells":
> + const: 1
> + description:
> + See include/dt-bindings/dt-bindings/phy/phy-qcom-qmp.h
> +
> + "#phy-cells":
> + const: 1
> + description:
> + See include/dt-bindings/dt-bindings/phy/phy-qcom-qmp.h
> +
> +required:
> + - compatible
> + - reg
> + - clocks
> + - clock-names
> + - power-domains
> + - resets
> + - reset-names
> + - vdda-phy-supply
> + - vdda-pll-supply
> + - "#clock-cells"
> + - "#phy-cells"
> +
> +additionalProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/clock/qcom,gcc-sc8280xp.h>
> +
> + phy@...b000 {
> + compatible = "qcom,sc8280xp-qmp-usb43dp-phy";
> + reg = <0x088eb000 0x4000>;
> +
> + clocks = <&gcc GCC_USB3_PRIM_PHY_AUX_CLK>,
> + <&gcc GCC_USB4_EUD_CLKREF_CLK>,
> + <&gcc GCC_USB3_PRIM_PHY_COM_AUX_CLK>,
> + <&gcc GCC_USB3_PRIM_PHY_PIPE_CLK>;
> + clock-names = "aux", "ref", "com_aux", "usb3_pipe";
> +
> + power-domains = <&gcc USB30_PRIM_GDSC>;
> +
> + resets = <&gcc GCC_USB3_PHY_PRIM_BCR>,
> + <&gcc GCC_USB4_DP_PHY_PRIM_BCR>;
> + reset-names = "phy", "common";
> +
> + vdda-phy-supply = <&vreg_l9d>;
> + vdda-pll-supply = <&vreg_l4d>;
> +
> + #clock-cells = <1>;
> + #phy-cells = <1>;
> + };
> diff --git a/include/dt-bindings/phy/phy-qcom-qmp.h b/include/dt-bindings/phy/phy-qcom-qmp.h
> new file mode 100644
> index 000000000000..24a92e5809a0
> --- /dev/null
> +++ b/include/dt-bindings/phy/phy-qcom-qmp.h
> @@ -0,0 +1,20 @@
> +/* SPDX-License-Identifier: GPL-2.0 */
Dual license. Otherwise,
Reviewed-by: Rob Herring <robh@...nel.org>
> +/*
> + * Qualcomm QMP PHY constants
> + *
> + * Copyright (C) 2022 Linaro Limited
> + */
> +
> +#ifndef _DT_BINDINGS_PHY_QMP
> +#define _DT_BINDINGS_PHY_QMP
> +
> +/* QMP USB4-USB3-DP clocks */
> +#define QMP_USB43DP_USB3_PIPE_CLK 0
> +#define QMP_USB43DP_DP_LINK_CLK 1
> +#define QMP_USB43DP_DP_VCO_DIV_CLK 2
> +
> +/* QMP USB4-USB3-DP PHYs */
> +#define QMP_USB43DP_USB3_PHY 0
> +#define QMP_USB43DP_DP_PHY 1
> +
> +#endif /* _DT_BINDINGS_PHY_QMP */
> --
> 2.37.4
>
>
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