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Message-ID: <20221116223045.GA1130586-robh@kernel.org>
Date: Wed, 16 Nov 2022 16:30:45 -0600
From: Rob Herring <robh@...nel.org>
To: Brad Larson <brad@...sando.io>
Cc: krzysztof.kozlowski@...aro.org, adrian.hunter@...el.com,
alcooperx@...il.com, andy.shevchenko@...il.com, arnd@...db.de,
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Subject: Re: [PATCH v8 06/17] dt-bindings: mfd: amd,pensando-elbasr: Add AMD
Pensando Elba System Resource chip
On Wed, Nov 16, 2022 at 11:39:40AM -0800, Brad Larson wrote:
> Add support for the AMD Pensando Elba SoC System Resource chip
> using the SPI interface.
>
> Signed-off-by: Brad Larson <blarson@....com>
> ---
>
> v8:
> - Apply review request changes and picked the two unique examples
> for the 4 chip-selects as one has the reset control support and
> the other an interrupt. Missed the --in-reply-to in git
> send-email for v7, included in this update.
No, you haven't. By default in git, you don't have to do anything. See
--thread and --no-chain-reply-to options. If you are messing with
--in-reply-to, you are doing it wrong.
Please resend the whole series properly threaded.
>
> v7:
> - Use system-controller for the device with four chip-selects
> connected over spi.
> - Delete child by moving reset-controller into the parent.
> - Updated and used dtschema-2022.11 and yamllint-1.28.0
>
> v6:
> - Expand description, rename nodes and change compatible usage
>
> v5:
> - Change to AMD Pensando instead of Pensando
>
> v4:
> - Change Maintained to Supported
>
> .../bindings/mfd/amd,pensando-elbasr.yaml | 60 +++++++++++++++++++
> 1 file changed, 60 insertions(+)
> create mode 100644 Documentation/devicetree/bindings/mfd/amd,pensando-elbasr.yaml
>
> diff --git a/Documentation/devicetree/bindings/mfd/amd,pensando-elbasr.yaml b/Documentation/devicetree/bindings/mfd/amd,pensando-elbasr.yaml
> new file mode 100644
> index 000000000000..622c93402a86
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/mfd/amd,pensando-elbasr.yaml
> @@ -0,0 +1,60 @@
> +# SPDX-License-Identifier: (GPL-2.0-only or BSD-2-Clause)
> +%YAML 1.2
> +---
> +$id: http://devicetree.org/schemas/mfd/amd,pensando-elbasr.yaml#
> +$schema: http://devicetree.org/meta-schemas/core.yaml#
> +
> +title: AMD Pensando Elba SoC Resource Controller
> +
> +description: |
> + AMD Pensando Elba SoC Resource Controller functions are
> + accessed with four chip-selects. Reset control is on CS0.
One device with 4 chip-selects? Then I'd expect 'reg = <0 1 2 3>;'
Hard to say more because I don't have the whole thread nor remember what
exactly we discussed before. That was 100s of bindings ago...
> +
> +maintainers:
> + - Brad Larson <blarson@....com>
> +
> +properties:
> + compatible:
> + enum:
> + - amd,pensando-elbasr
> +
> + "#reset-cells":
> + const: 1
> +
> + interrupts:
> + maxItems: 1
> +
> +required:
> + - compatible
> + - reg
> + - spi-max-frequency
> +
> +allOf:
> + - $ref: /schemas/spi/spi-peripheral-props.yaml#
> +
> +unevaluatedProperties: false
> +
> +examples:
> + - |
> + #include <dt-bindings/interrupt-controller/arm-gic.h>
> +
> + spi {
> + #address-cells = <1>;
> + #size-cells = <0>;
> + num-cs = <4>;
> +
> + system-controller@0 {
> + compatible = "amd,pensando-elbasr";
> + reg = <0>;
> + spi-max-frequency = <12000000>;
> + #reset-cells = <1>;
> + };
> +
> + system-controller@2 {
> + compatible = "amd,pensando-elbasr";
> + reg = <2>;
> + spi-max-frequency = <12000000>;
> + interrupt-parent = <&porta>;
> + interrupts = <0 IRQ_TYPE_LEVEL_LOW>;
> + };
> + };
> --
> 2.17.1
>
>
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