lists.openwall.net   lists  /  announce  owl-users  owl-dev  john-users  john-dev  passwdqc-users  yescrypt  popa3d-users  /  oss-security  kernel-hardening  musl  sabotage  tlsify  passwords  /  crypt-dev  xvendor  /  Bugtraq  Full-Disclosure  linux-kernel  linux-netdev  linux-ext4  linux-hardening  linux-cve-announce  PHC 
Open Source and information security mailing list archives
 
Hash Suite: Windows password security audit tool. GUI, reports in PDF.
[<prev] [next>] [thread-next>] [day] [month] [year] [list]
Date:   Wed, 16 Nov 2022 13:15:42 +0800
From:   Lu Baolu <baolu.lu@...ux.intel.com>
To:     Joerg Roedel <joro@...tes.org>
Cc:     Tina Zhang <tina.zhang@...el.com>, iommu@...ts.linux.dev,
        linux-kernel@...r.kernel.org
Subject: [PATCH 0/2] [PULL REQUEST] iommu/vt-d: Fixes for v6.1-rc6

Hi Joerg,

Below fixes are queued for v6.1. They aim to fix:

- Preset Access bit in FL non-leaf paging entries.
- Avoid setting hardware Reserved(0) bit.

This series is also available at github.
https://github.com/LuBaolu/intel-iommu/commits/vtd-fix-for-v6.1-rc6

Please consider it for the iommu/fix branch.

Best regards,
Lu Baolu

Tina Zhang (2):
  iommu/vt-d: Preset Access bit for IOVA in FL non-leaf paging entries
  iommu/vt-d: Set SRE bit only when hardware has SRS cap

 drivers/iommu/intel/iommu.c | 8 +++-----
 drivers/iommu/intel/pasid.c | 5 +++--
 2 files changed, 6 insertions(+), 7 deletions(-)

-- 
2.34.1

Powered by blists - more mailing lists

Powered by Openwall GNU/*/Linux Powered by OpenVZ