| lists.openwall.net | lists / announce owl-users owl-dev john-users john-dev passwdqc-users yescrypt popa3d-users / oss-security kernel-hardening musl sabotage tlsify passwords / crypt-dev xvendor / Bugtraq Full-Disclosure linux-kernel linux-netdev linux-ext4 linux-hardening linux-cve-announce PHC | |
|
Open Source and information security mailing list archives
| ||
|
Date: Wed, 16 Nov 2022 11:38:04 +0100
From: Konrad Dybcio <konrad.dybcio@...aro.org>
To: Neil Armstrong <neil.armstrong@...aro.org>,
Rob Herring <robh+dt@...nel.org>,
Andy Gross <agross@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Bjorn Andersson <andersson@...nel.org>
Cc: linux-i2c@...r.kernel.org, linux-arm-msm@...r.kernel.org,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org
Subject: Re: [PATCH 5/6] i2c: qcom-geni: add desc struct to prepare support
for I2C Master Hub variant
On 16/11/2022 11:21, Neil Armstrong wrote:
> The I2C Master Hub is a stripped down version of the GENI Serial Engine
> QUP Wrapper Controller but only supporting I2C serial engines without
> DMA support.
>
> Those I2C serial engines variants have some requirements:
> - a separate "core" clock
> - doesn't support DMA, thus no memory interconnect path
> - fixed FIFO size not discoverable in the HW_PARAM_0 register
>
> This adds a desc struct specifying all those requirements which
> will be used in a next change when adding the I2C Master Hub
> serial engine compatible.
>
> Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
> ---
Reviewed-by: Konrad Dybcio <konrad.dybcio@...aro.org>
Konrad
> drivers/i2c/busses/i2c-qcom-geni.c | 50 +++++++++++++++++++++++++++++++++++---
> 1 file changed, 47 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/i2c/busses/i2c-qcom-geni.c b/drivers/i2c/busses/i2c-qcom-geni.c
> index 84a77512614d..75dd0718c5a1 100644
> --- a/drivers/i2c/busses/i2c-qcom-geni.c
> +++ b/drivers/i2c/busses/i2c-qcom-geni.c
> @@ -88,6 +88,7 @@ struct geni_i2c_dev {
> int cur_wr;
> int cur_rd;
> spinlock_t lock;
> + struct clk *core_clk;
> u32 clk_freq_out;
> const struct geni_i2c_clk_fld *clk_fld;
> int suspended;
> @@ -100,6 +101,13 @@ struct geni_i2c_dev {
> bool abort_done;
> };
>
> +struct geni_i2c_desc {
> + bool has_core_clk;
> + char *icc_ddr;
> + bool no_dma_support;
> + unsigned int tx_fifo_depth;
> +};
> +
> struct geni_i2c_err_log {
> int err;
> const char *msg;
> @@ -764,6 +772,7 @@ static int geni_i2c_probe(struct platform_device *pdev)
> u32 proto, tx_depth, fifo_disable;
> int ret;
> struct device *dev = &pdev->dev;
> + const struct geni_i2c_desc *desc = NULL;
>
> gi2c = devm_kzalloc(dev, sizeof(*gi2c), GFP_KERNEL);
> if (!gi2c)
> @@ -776,6 +785,14 @@ static int geni_i2c_probe(struct platform_device *pdev)
> if (IS_ERR(gi2c->se.base))
> return PTR_ERR(gi2c->se.base);
>
> + desc = device_get_match_data(&pdev->dev);
> +
> + if (desc && desc->has_core_clk) {
> + gi2c->core_clk = devm_clk_get(dev, "core");
> + if (IS_ERR(gi2c->core_clk))
> + return PTR_ERR(gi2c->core_clk);
> + }
> +
> gi2c->se.clk = devm_clk_get(dev, "se");
> if (IS_ERR(gi2c->se.clk) && !has_acpi_companion(dev))
> return PTR_ERR(gi2c->se.clk);
> @@ -819,7 +836,7 @@ static int geni_i2c_probe(struct platform_device *pdev)
> gi2c->adap.dev.of_node = dev->of_node;
> strscpy(gi2c->adap.name, "Geni-I2C", sizeof(gi2c->adap.name));
>
> - ret = geni_icc_get(&gi2c->se, "qup-memory");
> + ret = geni_icc_get(&gi2c->se, desc ? desc->icc_ddr : "qup-memory");
> if (ret)
> return ret;
> /*
> @@ -829,12 +846,17 @@ static int geni_i2c_probe(struct platform_device *pdev)
> */
> gi2c->se.icc_paths[GENI_TO_CORE].avg_bw = GENI_DEFAULT_BW;
> gi2c->se.icc_paths[CPU_TO_GENI].avg_bw = GENI_DEFAULT_BW;
> - gi2c->se.icc_paths[GENI_TO_DDR].avg_bw = Bps_to_icc(gi2c->clk_freq_out);
> + if (!desc || desc->icc_ddr)
> + gi2c->se.icc_paths[GENI_TO_DDR].avg_bw = Bps_to_icc(gi2c->clk_freq_out);
>
> ret = geni_icc_set_bw(&gi2c->se);
> if (ret)
> return ret;
>
> + ret = clk_prepare_enable(gi2c->core_clk);
> + if (ret)
> + return ret;
> +
> ret = geni_se_resources_on(&gi2c->se);
> if (ret) {
> dev_err(dev, "Error turning on resources %d\n", ret);
> @@ -844,10 +866,15 @@ static int geni_i2c_probe(struct platform_device *pdev)
> if (proto != GENI_SE_I2C) {
> dev_err(dev, "Invalid proto %d\n", proto);
> geni_se_resources_off(&gi2c->se);
> + clk_disable_unprepare(gi2c->core_clk);
> return -ENXIO;
> }
>
> - fifo_disable = readl_relaxed(gi2c->se.base + GENI_IF_DISABLE_RO) & FIFO_IF_DISABLE;
> + if (desc && desc->no_dma_support)
> + fifo_disable = false;
> + else
> + fifo_disable = readl_relaxed(gi2c->se.base + GENI_IF_DISABLE_RO) & FIFO_IF_DISABLE;
> +
> if (fifo_disable) {
> /* FIFO is disabled, so we can only use GPI DMA */
> gi2c->gpi_mode = true;
> @@ -859,6 +886,16 @@ static int geni_i2c_probe(struct platform_device *pdev)
> } else {
> gi2c->gpi_mode = false;
> tx_depth = geni_se_get_tx_fifo_depth(&gi2c->se);
> +
> + /* I2C Master Hub Serial Elements doesn't have the HW_PARAM_0 register */
> + if (!tx_depth && desc)
> + tx_depth = desc->tx_fifo_depth;
> +
> + if (!tx_depth) {
> + dev_err(dev, "Invalid TX FIFO depth\n");
> + return -EINVAL;
> + }
> +
> gi2c->tx_wm = tx_depth - 1;
> geni_se_init(&gi2c->se, gi2c->tx_wm, tx_depth);
> geni_se_config_packing(&gi2c->se, BITS_PER_BYTE,
> @@ -867,6 +904,7 @@ static int geni_i2c_probe(struct platform_device *pdev)
> dev_dbg(dev, "i2c fifo/se-dma mode. fifo depth:%d\n", tx_depth);
> }
>
> + clk_disable_unprepare(gi2c->core_clk);
> ret = geni_se_resources_off(&gi2c->se);
> if (ret) {
> dev_err(dev, "Error turning off resources %d\n", ret);
> @@ -932,6 +970,8 @@ static int __maybe_unused geni_i2c_runtime_suspend(struct device *dev)
> gi2c->suspended = 1;
> }
>
> + clk_disable_unprepare(gi2c->core_clk);
> +
> return geni_icc_disable(&gi2c->se);
> }
>
> @@ -944,6 +984,10 @@ static int __maybe_unused geni_i2c_runtime_resume(struct device *dev)
> if (ret)
> return ret;
>
> + ret = clk_prepare_enable(gi2c->core_clk);
> + if (ret)
> + return ret;
> +
> ret = geni_se_resources_on(&gi2c->se);
> if (ret)
> return ret;
>
Powered by blists - more mailing lists