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Message-Id: <20221115-topic-sm8550-upstream-dts-qce-v1-0-fe750dfa90f6@linaro.org>
Date: Wed, 16 Nov 2022 11:48:35 +0100
From: Neil Armstrong <neil.armstrong@...aro.org>
To: Bjorn Andersson <andersson@...nel.org>,
Konrad Dybcio <konrad.dybcio@...ainline.org>,
Andy Gross <agross@...nel.org>,
Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>,
Rob Herring <robh+dt@...nel.org>
Cc: Neil Armstrong <neil.armstrong@...aro.org>,
linux-kernel@...r.kernel.org, devicetree@...r.kernel.org,
linux-arm-msm@...r.kernel.org
Subject: [PATCH] arm64: dts: qcom: sm8550: add QCrypto nodes
Add the QCE and Crypto BAM DMA nodes.
Signed-off-by: Neil Armstrong <neil.armstrong@...aro.org>
---
Depends on:
- QCE new socs support [1]
- SM8550 QCE bindings [2]
- SM8550 base DT [3]
To: Andy Gross <agross@...nel.org>
To: Bjorn Andersson <andersson@...nel.org>
To: Konrad Dybcio <konrad.dybcio@...ainline.org>
To: Rob Herring <robh+dt@...nel.org>
To: Krzysztof Kozlowski <krzysztof.kozlowski+dt@...aro.org>
Cc: linux-arm-msm@...r.kernel.org
Cc: devicetree@...r.kernel.org
Cc: linux-kernel@...r.kernel.org
[1] https://lore.kernel.org/all/20220920114051.1116441-1-bhupesh.sharma@linaro.org/
[2] https://lore.kernel.org/all/20221114-narmstrong-sm8550-upstream-qce-v1-0-31b489d5690a@linaro.org/
[3] https://lore.kernel.org/all/20221116103146.2556846-1-abel.vesa@linaro.org/
---
arch/arm64/boot/dts/qcom/sm8550.dtsi | 24 ++++++++++++++++++++++++
1 file changed, 24 insertions(+)
diff --git a/arch/arm64/boot/dts/qcom/sm8550.dtsi b/arch/arm64/boot/dts/qcom/sm8550.dtsi
index 07ba709ca35f..a490b705ce5c 100644
--- a/arch/arm64/boot/dts/qcom/sm8550.dtsi
+++ b/arch/arm64/boot/dts/qcom/sm8550.dtsi
@@ -1372,6 +1372,30 @@ mmss_noc: interconnect@...0000 {
qcom,bcm-voters = <&apps_bcm_voter>;
};
+ cryptobam: dma-controller@...4000 {
+ compatible = "qcom,bam-v1.7.0";
+ reg = <0x0 0x01dc4000 0x0 0x28000>;
+ interrupts = <GIC_SPI 272 IRQ_TYPE_LEVEL_HIGH>;
+ #dma-cells = <1>;
+ qcom,ee = <0>;
+ qcom,controlled-remotely;
+ iommus = <&apps_smmu 0x480 0x0>,
+ <&apps_smmu 0x481 0x0>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
+ interconnect-names = "memory";
+ };
+
+ crypto: crypto@...0000 {
+ compatible = "qcom,sm8550-qce";
+ reg = <0x0 0x01dfa000 0x0 0x6000>;
+ dmas = <&cryptobam 4>, <&cryptobam 5>;
+ dma-names = "rx", "tx";
+ iommus = <&apps_smmu 0x480 0x0>,
+ <&apps_smmu 0x481 0x0>;
+ interconnects = <&aggre2_noc MASTER_CRYPTO 0 &mc_virt SLAVE_EBI1 0>;
+ interconnect-names = "memory";
+ };
+
tcsr_mutex: hwlock@...0000 {
compatible = "qcom,tcsr-mutex";
reg = <0x0 0x01f40000 0x0 0x20000>;
---
base-commit: a237afe452d9079aa024e465642b4cde0a04c7ff
change-id: 20221115-topic-sm8550-upstream-dts-qce-7f4fe79e0375
Best regards,
--
Neil Armstrong <neil.armstrong@...aro.org>
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