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Message-ID: <4f872825-e646-8a8c-dbd0-112328b9b5f2@quicinc.com>
Date:   Wed, 16 Nov 2022 03:37:25 -0800
From:   Abhinav Kumar <quic_abhinavk@...cinc.com>
To:     Konrad Dybcio <konrad.dybcio@...aro.org>,
        <linux-arm-msm@...r.kernel.org>, <andersson@...nel.org>,
        <agross@...nel.org>
CC:     <patches@...aro.org>, Konrad Dybcio <konrad.dybcio@...ainline.org>,
        "Dmitry Baryshkov" <dmitry.baryshkov@...aro.org>,
        Rob Clark <robdclark@...il.com>, Sean Paul <sean@...rly.run>,
        David Airlie <airlied@...il.com>,
        Daniel Vetter <daniel@...ll.ch>,
        Kalyan Thota <quic_kalyant@...cinc.com>,
        "AngeloGioacchino Del Regno" 
        <angelogioacchino.delregno@...ainline.org>,
        Loic Poulain <loic.poulain@...aro.org>,
        <dri-devel@...ts.freedesktop.org>,
        <freedreno@...ts.freedesktop.org>, <linux-kernel@...r.kernel.org>
Subject: Re: [PATCH] drm/msm/dpu1: Remove INTF4 IRQ from SDM845 IRQ mask



On 11/7/2022 2:37 AM, Konrad Dybcio wrote:
> From: Konrad Dybcio <konrad.dybcio@...ainline.org>
> 
> SDM845 only has INTF0-3 and has no business caring about the INTF4 irq.
> 
> Suggested-by: Dmitry Baryshkov <dmitry.baryshkov@...aro.org>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@...ainline.org>
> Signed-off-by: Konrad Dybcio <konrad.dybcio@...aro.org>

It is true that SDM845 doesnt have INTF4. I was a bit concerned whether 
this would impact SM8150 as that re-uses the IRQ_SDM845_MASK but even 
SM8150 doesnt have INTF4.

A minor nit, the subject convention in this file seems to be drm/msm/dpu 
and not drm/msm/dpu1.

Other than that,

Reviewed-by: Abhinav Kumar <quic_abhinavk@...cinc.com>


> ---
>   drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c | 1 -
>   1 file changed, 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> index 27f029fdc682..06897a497eb7 100644
> --- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> +++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_catalog.c
> @@ -86,7 +86,6 @@
>   			 BIT(MDP_INTF1_INTR) | \
>   			 BIT(MDP_INTF2_INTR) | \
>   			 BIT(MDP_INTF3_INTR) | \
> -			 BIT(MDP_INTF4_INTR) | \
>   			 BIT(MDP_AD4_0_INTR) | \
>   			 BIT(MDP_AD4_1_INTR))
>   

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