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Message-ID: <BYAPR11MB3240F382BD180FF90C7DF0B9E1069@BYAPR11MB3240.namprd11.prod.outlook.com>
Date:   Thu, 17 Nov 2022 18:47:39 +0000
From:   "N, Pandith" <pandith.n@...el.com>
To:     Dipen Patel <dipenp@...dia.com>
CC:     "linux-kernel@...r.kernel.org" <linux-kernel@...r.kernel.org>,
        "Hall, Christopher S" <christopher.s.hall@...el.com>,
        "Gross, Mark" <mark.gross@...el.com>,
        "Sangannavar, Mallikarjunappa" 
        <mallikarjunappa.sangannavar@...el.com>,
        "D, Lakshmi Sowjanya" <lakshmi.sowjanya.d@...el.com>,
        "T R, Thejesh Reddy" <thejesh.reddy.t.r@...el.com>,
        "andriy.shevchenko@...ux.intel.com" 
        <andriy.shevchenko@...ux.intel.com>
Subject: Intel timed i/o driver in HTE

Hi Dipen,

To support Intel timed i/o driver, it was suggested by Linux community to enhance hte framework.
However, we see some limitations to support complete Intel timed i/o device.

1. The current framework supports Nvidia IP, which has two IP blocks (hw timestamping engine interfaced with GPIO)
Intel timed i/o is a single IP block handling multiple functionalities like:

	a. Input timestamping with event counter.
	b. Timed output  - single shot or periodic pulse train.
	Uses TSC(Timestamp counter) for timestamp or generate events, which could be translated to system time.
	c. Implement PPS functionality to export time.

This requires new functionality(interface) to be developed in hte framework specific to timed-io device.

2. The current hte framework has a provider and consumer concept.
Consumer is responsible for user space interaction.
Currently Nvidia is using GPIO for input timestamping  (by adding hw timestamps in gpiolib-cdev.c)

For Intel timed i/o functionalities, current gpio user interfaces cannot support event counter
or output modes.
Rather than jigging hte consumer into other subsystems to support timed i/o device. 
Any possibility of developing a native consumer in hte subsystem, which could handle user space interactions for timestamping engines.

I cannot think of an existing subsystem that handles Intel timed i/o functionalities 1a, 1b and 1c (mentioned above).

Regards,
Pandith




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