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Message-Id: <cover.1668618583.git.jinankjain@linux.microsoft.com>
Date: Thu, 17 Nov 2022 03:27:53 +0000
From: Jinank Jain <jinankjain@...ux.microsoft.com>
To: jinankjain@...rosoft.com
Cc: kys@...rosoft.com, haiyangz@...rosoft.com, wei.liu@...nel.org,
decui@...rosoft.com, tglx@...utronix.de, mingo@...hat.com,
bp@...en8.de, dave.hansen@...ux.intel.com, x86@...nel.org,
hpa@...or.com, arnd@...db.de, peterz@...radead.org,
jpoimboe@...nel.org, jinankjain@...ux.microsoft.com,
seanjc@...gle.com, kirill.shutemov@...ux.intel.com,
ak@...ux.intel.com, sathyanarayanan.kuppuswamy@...ux.intel.com,
linux-hyperv@...r.kernel.org, linux-kernel@...r.kernel.org,
linux-arch@...r.kernel.org, anrayabh@...ux.microsoft.com,
mikelley@...rosoft.com
Subject: [PATCH v4 0/5] Add support running nested Microsoft Hypervisor
This patch series plans to add support for running nested Microsoft
Hypervisor. In case of nested Microsoft Hypervisor there are few
privileged hypercalls which need to go L0 Hypervisor instead of L1
Hypervisor. This patches series basically identifies such hypercalls and
replace them with nested hypercalls.
Jinank Jain (5):
x86/hyperv: Add support for detecting nested hypervisor
Drivers: hv: Setup synic registers in case of nested root partition
x86/hyperv: Add an interface to do nested hypercalls
Drivers: hv: Enable vmbus driver for nested root partition
x86/hyperv: Change interrupt vector for nested root partition
[v4]
- Fix ARM64 compilation
arch/arm64/hyperv/mshyperv.c | 6 +++
arch/x86/include/asm/hyperv-tlfs.h | 17 ++++++-
arch/x86/include/asm/idtentry.h | 2 +
arch/x86/include/asm/irq_vectors.h | 6 +++
arch/x86/include/asm/mshyperv.h | 68 ++++++++++++++++------------
arch/x86/kernel/cpu/mshyperv.c | 71 ++++++++++++++++++++++++++++++
arch/x86/kernel/idt.c | 9 ++++
drivers/hv/hv.c | 18 +++++---
drivers/hv/hv_common.c | 7 ++-
drivers/hv/vmbus_drv.c | 5 ++-
include/asm-generic/hyperv-tlfs.h | 1 +
include/asm-generic/mshyperv.h | 1 +
12 files changed, 173 insertions(+), 38 deletions(-)
--
2.25.1
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